| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 1014 Instr Assembler::ImmCondBranch(int imm19) {
1015 CHECK(is_int19(imm19));
1016 return truncate_to_int19(imm19) << ImmCondBranch_offset;
1020 Instr Assembler::ImmCmpBranch(int imm19) {
1021 CHECK(is_int19(imm19));
1022 return truncate_to_int19(imm19) << ImmCmpBranch_offset;
1094 Instr Assembler::ImmLLiteral(int imm19) {
1095 CHECK(is_int19(imm19));
1096 return truncate_to_int19(imm19) << ImmLLiteral_offset;
[all...] |
| assembler-arm64.cc | 995 void Assembler::b(int imm19, Condition cond) {
996 Emit(B_cond | ImmCondBranch(imm19) | cond);
[all...] |
| assembler-arm64.h | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.td | 677 def CC : F2_3<0b001, 0, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond),
678 !strconcat("b$cond ", !strconcat(regstr, ", $imm19")),
680 def CCA : F2_3<0b001, 1, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond),
681 !strconcat("b$cond,a ", !strconcat(regstr, ", $imm19")),
683 def CCNT : F2_3<0b001, 0, 0, (outs), (ins bprtarget:$imm19, CCOp:$cond),
684 !strconcat("b$cond,pn ", !strconcat(regstr, ", $imm19")),
686 def CCANT : F2_3<0b001, 1, 0, (outs), (ins bprtarget:$imm19, CCOp:$cond),
687 !strconcat("b$cond,a,pn ", !strconcat(regstr, ", $imm19")),
732 def CC : F2_3<0b101, 0, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond,
734 "fb$cond $cc, $imm19", []>;
[all...] |
| SparcInstrFormats.td | 68 bits<19> imm19;
77 let Inst{18-0} = imm19;
|
| SparcInstr64Bit.td | 312 defm BPX : IPredBranch<"%xcc", [(SPbrxcc bb:$imm19, imm:$cond)]>;
|
| /external/vixl/src/vixl/a64/ |
| assembler-a64.h | [all...] |
| assembler-a64.cc | 593 ptrdiff_t imm19 = ldr->ImmLLiteral();
594 VIXL_ASSERT(imm19 <= 0);
595 done = (imm19 == 0);
596 offset += imm19 * kLiteralEntrySize;
669 void Assembler::b(int imm19, Condition cond) {
670 Emit(B_cond | ImmCondBranch(imm19) | cond);
701 int imm19) {
702 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt));
715 int imm19) {
716 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt))
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | 330 int32_t imm19 = instr->Imm19Value(); local
332 imm19 <<= (32 - kImm19Bits);
333 imm19 >>= (32 - kImm19Bits);
334 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm19);
604 DCHECK(STRING_STARTS_WITH(format, "imm19"));
[all...] |
| simulator-mips.cc | 4299 int32_t imm19 = instr->Imm19Value(); local
[all...] |
| assembler-mips.cc | [all...] |
| assembler-mips.h | 775 void addiupc(Register rs, int32_t imm19);
[all...] |
| /external/vixl/doc/ |
| supported-instructions.md | 112 void b(int imm19, Condition cond)
223 void cbnz(const Register& rt, int imm19)
237 void cbz(const Register& rt, int imm19)
603 Load integer or FP register from pc + imm19 << 2.
605 void ldr(const CPURegister& rt, int imm19)
657 Load word with sign extension from pc + imm19 << 2.
659 void ldrsw(const Register& rt, int imm19)
912 Prefetch from pc + imm19 << 2.
914 void prfm(PrefetchOperation op, int imm19)
[all...] |
| /external/v8/src/mips64/ |
| disasm-mips64.cc | 333 int32_t imm19 = instr->Imm19Value(); local
335 imm19 <<= (32 - kImm19Bits);
336 imm19 >>= (32 - kImm19Bits);
337 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm19);
619 DCHECK(STRING_STARTS_WITH(format, "imm19"));
[all...] |
| simulator-mips64.cc | 4538 int32_t imm19 = instr->Imm19Value(); local
[all...] |
| assembler-mips64.cc | [all...] |
| assembler-mips64.h | 820 void addiupc(Register rs, int32_t imm19);
[all...] |
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MachObjectWriter.cpp | 171 // imm19 relocations are for conditional branches, which require
|
| /external/valgrind/VEX/priv/ |
| guest_arm64_toIR.c | 4924 UInt imm19 = INSN(23,5); local
5630 UInt imm19 = INSN(23,5); local
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 611 void MipsAssembler::Addiupc(Register rs, uint32_t imm19) {
613 CHECK(IsUint<19>(imm19)) << imm19;
614 EmitI21(0x3B, rs, imm19);
[all...] |
| assembler_mips.h | 226 void Addiupc(Register rs, uint32_t imm19); // R6
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 537 void Mips64Assembler::Addiupc(GpuRegister rs, uint32_t imm19) {
538 CHECK(IsUint<19>(imm19)) << imm19;
539 EmitI21(0x3B, rs, imm19);
[all...] |
| assembler_mips64.h | 217 void Addiupc(GpuRegister rs, uint32_t imm19);
|
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 5058 int32_t imm19; member in struct:TestCaseAddiupc
[all...] |
| test-assembler-mips64.cc | 5430 int32_t imm19; member in struct:TestCaseAddiupc
[all...] |
