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  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-nds32/
imm_symbol.s 2 .globl imm20
6 .set imm20, 0x11223
imm.s 5 la $r0, imm20
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/
add_test.s 80 # ADDD imm4/imm16/imm20/imm32, regp
mov_test.s 44 # MOVD imm4/imm16/imm20/imm32, regp
  /toolchain/binutils/binutils-2.25/include/opcode/
cr16.h 122 imm3, imm4, imm5, imm6, imm16, imm20, imm32, enumerator in enum:__anon76111
nds32.h 71 #define N32_TYPE1(op6, rt5, imm20) \
72 (N32_TYPE2 (op6, rt5, 0, 0) | __MF (imm20, 0, 20))
  /toolchain/binutils/binutils-2.25/opcodes/
msp430-dis.c 830 case 11: /* CALLA #imm20 */
1055 case 8: /* MOVA #imm20, Rdst */
cr16-opc.c 561 {20, arg_ic, OP_SIGNED}, /* imm20 */
ChangeLog-2012 801 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
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ppc-opc.c 389 /* The IMM20 field in an LI instruction. */
390 #define IMM20 FXM4 + 1
394 #define L IMM20 + 1
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  /toolchain/binutils/binutils-2.25/bfd/
elf32-cr16.c     [all...]
ChangeLog-2007 697 * elf32-cr16.c: Fixed DISP8, DISP20 and IMM20 relocations at
699 Added the below relaxations: IMM32 -> IMM20/IM16 -> IMM4.
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  /external/pcre/dist/sljit/
sljitLir.c 136 /* conditional + imm20 */
    [all...]
  /toolchain/binutils/binutils-2.25/gas/config/
tc-msp430.c     [all...]

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