/external/llvm/test/CodeGen/ARM/ |
big-endian-neon-extend.ll | 7 ; CHECK-NEXT: vmovl.u8 [[QREG:q[0-9]+]], [[REG]] 8 ; CHECK-NEXT: vmovl.u16 [[QREG]], [[REG]] 9 ; CHECK-NEXT: vmovl.u32 [[QREG]], [[REG]] 22 ; CHECK-NEXT: vmovl.u16 [[QREG:q[0-9]+]], [[REG]] 23 ; CHECK-NEXT: vmovl.u32 [[QREG]], [[REG]] 37 ; CHECK-NEXT: vmovl.u8 [[QREG:q[0-9]+]], [[REG]] 38 ; CHECK-NEXT: vmovl.u16 [[QREG]], [[REG]] 52 ; CHECK-NEXT: vmovl.u16 [[QREG:q[0-9]+]], [[REG]] 66 ; CHECK-NEXT: vmovl.u8 [[QREG:q[0-9]+]], [[REG]] 67 ; CHECK-NEXT: vmovl.u16 [[QREG]], [[REG] [all...] |
/external/v8/src/arm/ |
simulator-arm.h | 154 void get_q_register(int qreg, uint64_t* value); 155 void set_q_register(int qreg, const uint64_t* value); 156 void get_q_register(int qreg, uint32_t* value); 157 void set_q_register(int qreg, const uint32_t* value);
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simulator-arm.cc | [all...] |
/external/vixl/test/ |
test-utils-a64.h | 114 inline vec128_t qreg(unsigned code) const { function in class:vixl::RegisterDump
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test-utils-a64.cc | 148 vec128_t result = core->qreg(vreg.code());
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/external/valgrind/VEX/priv/ |
host_arm64_defs.h | 513 ARM64in_VQfromX, /* Move an Xreg to a Qreg lo64, and zero hi64 */ 514 ARM64in_VQfromXX, /* Move 2 Xregs to a Qreg */ 515 ARM64in_VXfromQ, /* Move half a Qreg to an Xreg */ [all...] |
guest_arm64_toIR.c | [all...] |
guest_arm_toIR.c | 802 /* Plain ("low level") read from a Neon Qreg. */ 809 /* Architected read from a Neon Qreg. */ 814 /* Plain ("low level") write to a Neon Qreg. */ 822 /* Architected write to a Neon Qreg. Handles conditional writes to the [all...] |
/external/vixl/src/vixl/a64/ |
simulator-a64.cc | 594 qreg_t rawbits = qreg(code); [all...] |
assembler-a64.cc | 193 #define QREG(n) q##n, 195 REGISTER_CODE_LIST(QREG) 197 #undef QREG [all...] |
simulator-a64.h | 902 qreg_t qreg(unsigned code) const { [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | [all...] |
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/lib/gcc/x86_64-linux/4.8/32/ |
libgcc_eh.a | 790 ?$ F ?9 ^? ??3 Z
? ^? ) ??3 Z? ? `? %+4 4 ? ?+4 6? %? ? 6? %+4 ?K? '? ??}Jfs ($
??~Qreg |