| /external/llvm/test/CodeGen/X86/ |
| 2012-07-15-broadcastfold.ll | 6 ;CHECK: vmov{{[au]}}ps %xmm{{[0-9]+}}, [[SPILLED:[^\)]+\)]]
8 ;CHECK: vbroadcastss [[SPILLED]], %ymm0
|
| 2003-08-03-CallArgLiveRanges.ll | 9 ; CHECK-NOT: spilled
|
| win32-spill-xmm.ll | 3 ; Check proper alignment of spilled vector
20 ; Check that proper alignment of spilled vector does not affect vargs
|
| reghinting.ll | 5 ;; Check that they are spilled early enough that not copies are needed for the
|
| 2010-06-15-FastAllocEarlyCLobber.ll | 14 ; The earlyclobber register EC0 should not be spilled before the inline asm.
|
| /art/test/529-long-split/src/ |
| Main.java | 39 myLongField2 = a; // Make sure ESI-EDI gets spilled and not ECX-EDX
45 // At this point `b` has been spilled and needs to have a pair. The ordering
58 // EBP could be spilled
60 // EDI could be spilled
81 myLongField2 = a; // Make sure ESI-EDI gets spilled and not ECX-EDX
87 // At this point `b` has been spilled and needs to have a pair. The ordering
100 // EBP could be spilled
102 // EDI could be spilled
128 // At this point `a` and `b` have been spilled and need to have a pairs. The ordering
141 // EBP could be spilled
[all...] |
| /prebuilts/go/darwin-x86/test/fixedbugs/ |
| issue4066.go | 7 // issue 4066: return values not being spilled eagerly enough
|
| /prebuilts/go/linux-x86/test/fixedbugs/ |
| issue4066.go | 7 // issue 4066: return values not being spilled eagerly enough
|
| /external/v8/test/mjsunit/regress/ |
| regress-815.js | 29 // end up in a spilled scope in code that only worked in a register
32 // The code generated for unary + assumes that we are not in a spilled
38 // in a spilled scope:
|
| regress-crbug-173907.js | 45 spill(); // At this point initial values for phi1 and phi2 are spilled.
56 // All registers are blocked and phis for phi1 and phi2 are spilled because
57 // their left (incoming) value is spilled, there are no free registers,
|
| regress-crbug-173907b.js | 45 spill(); // At this point initial values for phi1 and phi2 are spilled.
56 // All registers are blocked and phis for phi1 and phi2 are spilled because
57 // their left (incoming) value is spilled, there are no free registers,
|
| /external/llvm/test/CodeGen/AArch64/ |
| remat-float0.ll | 4 ; of spilled/filled.
|
| arm64-patchpoint-scratch-regs.ll | 3 ; Test that scratch registers are spilled around patchpoints
|
| /external/v8/src/crankshaft/ia32/ |
| lithium-gap-resolver-ia32.h | 50 // Ensure that the given operand is not spilled.
78 // If we had to spill on demand, the currently spilled register's
|
| /external/v8/src/crankshaft/x87/ |
| lithium-gap-resolver-x87.h | 50 // Ensure that the given operand is not spilled.
78 // If we had to spill on demand, the currently spilled register's
|
| /external/llvm/include/llvm/CodeGen/ |
| VirtRegMap.h | 48 /// it; even spilled virtual registers (the register mapped to a
49 /// spilled register is the temporary used to load it from the
54 /// mapping. Each spilled virtual register has an entry in it
55 /// which corresponds to the stack slot this register is spilled
|
| LiveRangeEdit.h | 11 // is spilled or split.
111 /// @param parent The register being spilled or split.
218 /// RegsBeingSpilled lists registers currently being spilled by the register
|
| /external/v8/src/compiler/ |
| live-range-separator.h | 50 // Mark ranges spilled in deferred blocks, that also cover non-deferred code.
|
| register-allocator.cc | 312 DCHECK(!HasRegisterAssigned() && !spilled());
318 DCHECK(HasRegisterAssigned() && !spilled());
324 DCHECK(!spilled());
413 DCHECK(!spilled());
417 DCHECK(spilled());
742 TRACE("Live Range %d will be spilled only in deferred blocks.\n", vreg());
743 // If we have ranges that aren't spilled but require the operand on the stack,
746 if (!child->spilled() &&
960 temp->set_spilled(first->spilled());
961 if (!temp->spilled())
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| subreg-remat.ll | 16 ; The vector must be spilled:
41 ; The vector must not be spilled:
|
| /art/compiler/jni/quick/mips64/ |
| calling_convention_mips64.h | 66 return 0; // Floats aren't spilled in JNI down call
|
| /art/compiler/debug/dwarf/ |
| register.h | 32 // mapping we cannot easily say S0 is spilled and S1 is not.
|
| /art/compiler/jni/quick/mips/ |
| calling_convention_mips.h | 67 return 0; // Floats aren't spilled in JNI down call
|
| /art/test/526-long-regalloc/src/ |
| Main.java | 43 // would not see the register use, and think the interval can just be spilled and not be
|
| /external/llvm/lib/Target/AVR/ |
| AVRMachineFunctionInfo.h | 27 /// Indicates if a register has been spilled by the register
|
