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  /external/libvncserver/libvncserver/
rfbregion.c 20 struct sraRegion *subspan; member in struct:sraSpan
34 sraSpanCreate(int start, int end, const sraSpanList *subspan) {
39 item->subspan = sraSpanListDup(subspan);
47 span = sraSpanCreate(src->start, src->end, src->subspan);
75 if (span->subspan) sraSpanListDestroy(span->subspan);
113 if (s->subspan)
114 sraSpanListPrint(s->subspan);
192 (!sraSpanListEqual(sp1->subspan, sp2->subspan)))
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  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_blorp_blit.cpp 828 /* R1.2[15:0] = X coordinate of upper left pixel of subspan 0 (pixel 0)
829 * R1.3[15:0] = X coordinate of upper left pixel of subspan 1 (pixel 4)
830 * R1.4[15:0] = X coordinate of upper left pixel of subspan 2 (pixel 8)
831 * R1.5[15:0] = X coordinate of upper left pixel of subspan 3 (pixel 12)
833 * Pixels within a subspan are laid out in this arrangement:
843 * result, since pixels n+1 and n+3 are in the right half of the subspan.
853 * pixels n+2 and n+3 are in the bottom half of the subspan.
861 * Therefore, subspan 0 will represent sample 0, subspan 1 will
874 * Therefore, subspan 0 will represent sample N (where N is 0 or 4)
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brw_clear.c 84 * this subspan, it's the hardware's current clear value." Then later rendering
  /external/libdrm/intel/
intel_bufmgr_fake.c 858 /* 965 subspan loading alignment */
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