| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| alias.d | 77 114: 4f08a448 sxtl2 v8.8h, v2.16b
78 118: 4f08a448 sxtl2 v8.8h, v2.16b
81 124: 4f10a448 sxtl2 v8.4s, v2.8h
82 128: 4f10a448 sxtl2 v8.4s, v2.8h
85 134: 4f20a448 sxtl2 v8.2d, v2.4s
86 138: 4f20a448 sxtl2 v8.2d, v2.4s
|
| /external/llvm/test/MC/AArch64/ |
| neon-sxtl.s | 20 sxtl2 v0.8h, v1.16b
21 sxtl2 v0.4s, v1.8h
22 sxtl2 v0.2d, v1.4s
|
| arm64-aliases.s | 692 sxtl2 v1.8h, v2.16b
694 sxtl2.8h v1, v2
697 sxtl2 v1.4s, v2.8h
699 sxtl2.4s v1, v2
702 sxtl2 v1.2d, v2.4s
704 sxtl2.2d v1, v2
|
| /external/vixl/src/vixl/a64/ |
| logic-a64.cc | 2481 LogicVRegister Simulator::sxtl2(VectorFormat vform, function in class:vixl::Simulator
[all...] |
| macro-assembler-a64.h | [all...] |
| simulator-a64.h | [all...] |
| disasm-a64.cc | [all...] |
| assembler-a64.h | [all...] |
| assembler-a64.cc | [all...] |
| /external/libhevc/common/arm64/ |
| ihevc_intra_pred_luma_vert.s | 206 sxtl2 v28.8h, v26.16b
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| aarch64-asm-2.c | 82 case 316: /* sxtl2 */
|
| ChangeLog-2013 | [all...] |
| aarch64-dis-2.c | [all...] |
| aarch64-tbl.h | [all...] |
| /external/vixl/test/ |
| test-disasm-a64.cc | [all...] |
| /external/vixl/doc/ |
| supported-instructions.md | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.td | [all...] |
| /external/libyuv/files/source/ |
| row_neon64.cc | [all...] |
| /external/libvpx/libvpx/third_party/libyuv/source/ |
| row_neon64.cc | [all...] |
