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  /external/llvm/test/CodeGen/X86/
2007-08-01-LiveVariablesBug.ll 8 %tmp5 = mul i8 %tmp4, %tmp2
9 ret i8 %tmp5
fp-stack-direct-ret.ll 8 %tmp5 = tail call double @foo()
9 ret double %tmp5
bc-extract.ll 16 %tmp5 = extractelement <2 x float> %tmp4, i32 1
17 ret float %tmp5
24 %tmp5 = extractelement <2 x i32> %tmp4, i32 1
25 ret i32 %tmp5
rotate2.ll 7 %tmp5 = or i64 %tmp2, %tmp4 ; <i64> [#uses=1]
8 ret i64 %tmp5
15 %tmp5 = or i32 %tmp2, %tmp4 ; <i32> [#uses=1]
16 %tmp56 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]
2008-05-01-InvalidOrdCompare.ll 7 %tmp5 = fcmp uno double %p, 0.000000e+00
8 br i1 %tmp5, label %bb, label %UnifiedReturnBlock
fp-stack-retcopy.ll 9 %tmp5 = tail call double @foo() nounwind ; <double> [#uses=1]
10 ret double %tmp5
2009-05-19-SingleElementExtractElement.ll 7 %tmp5.i = extractelement <1 x i64> %a, i32 0
8 %tmp11 = bitcast i64 %tmp5.i to <1 x i64>
2007-03-15-GEP-Idx-Sink.ll 16 %tmp5.sum72 = add i32 %col, 7 ; <i32> [#uses=1]
17 %tmp5.sum71 = add i32 %col, 5 ; <i32> [#uses=1]
18 %tmp5.sum70 = add i32 %col, 3 ; <i32> [#uses=1]
19 %tmp5.sum69 = add i32 %col, 2 ; <i32> [#uses=1]
20 %tmp5.sum68 = add i32 %col, 1 ; <i32> [#uses=1]
21 %tmp5.sum66 = add i32 %col, 4 ; <i32> [#uses=1]
22 %tmp5.sum = add i32 %col, 6 ; <i32> [#uses=1]
31 %tmp5 = getelementptr i8, i8* %tmp3, i32 %col ; <i8*> [#uses=1]
33 store i8 %tmp7, i8* %tmp5
37 %tmp15 = getelementptr i8, i8* %tmp3, i32 %tmp5.sum72 ; <i8*> [#uses=1
    [all...]
  /external/llvm/test/CodeGen/PowerPC/
ppcf128-2.ll 7 %tmp5 = fsub ppc_fp128 0xM80000000000000000000000000000000, %a ; <ppc_fp128> [#uses=1]
8 %tmp6 = tail call i64 @__fixunstfdi( ppc_fp128 %tmp5 ) nounwind ; <i64> [#uses=0]
  /external/webrtc/webrtc/common_audio/signal_processing/
complex_fft_mips.c 34 int32_t tmp5 = 0; local
76 "lh %[tmp5], 2(%[ptr_i]) \n\t"
88 "sll %[tmp5], %[tmp5], 14 \n\t"
93 "addu %[tmp6], %[tmp5], %[tmp2] \n\t"
94 "subu %[tmp5], %[tmp5], %[tmp2] \n\t"
98 "shra_r.w %[tmp5], %[tmp5], 15 \n\t"
105 "sll %[tmp5], %[tmp5], 14 \n\t
157 int32_t tmp5 = 0, tmp6 = 0, tmp = 0, tempMax = 0, round2 = 0; local
    [all...]
  /external/llvm/test/Analysis/BasicAA/
full-store-partial-alias.ll 6 ; so the %tmp5 load is PartialAlias with the store and suppress TBAA.
7 ; Without BasicAA, TBAA should say that %tmp5 is NoAlias with the store.
17 ; BASICAA: ret i32 %tmp5.lobit
27 %tmp5 = load i32, i32* %arrayidx, align 4, !tbaa !3
28 %tmp5.lobit = lshr i32 %tmp5, 31
29 ret i32 %tmp5.lobit
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/
h264bsd_interpolate_chroma_hor_ver.s 60 tmp5 RN 10 label
182 LDRB tmp5, [ptrA, width, LSL #1]
185 PKHBT tmp3, tmp3, tmp5, LSL #16 ;// |t5|t3|
201 MLA tmp5, tmp1, valX, c32 ;// t5=t1*valX+32
202 MLA tmp5, tmp2, xFrac, tmp5 ;// t5=t2*xFrac+t5
210 MOV tmp5, tmp5, LSR #6 ;// scale down
211 STRB tmp5, [mb], #1 ;// store pixel
216 LDRB tmp5, [ptrA, width, LSL #1
    [all...]
  /external/llvm/test/CodeGen/Generic/
2005-10-21-longlonggtu.ll 5 %tmp5 = add i64 %u, 9007199254740991 ; <i64> [#uses=1]
6 %tmp = icmp ugt i64 %tmp5, 18014398509481982 ; <i1> [#uses=1]
  /external/llvm/test/Transforms/InstCombine/
2008-06-13-ReadOnlyCallStore.ll 7 %tmp5 = icmp ne i32 %tmp3, 0
8 br i1 %tmp5, label %bb, label %bb8
apint-cast.ll 10 %tmp5 = shl i37 %tmp, 8 ; <i37> [#uses=1]
11 ; CHECK: %tmp5 = shl i17 %a, 8
12 %tmp.upgrd.32 = or i37 %tmp21, %tmp5 ; <i37> [#uses=1]
13 ; CHECK: %tmp.upgrd.32 = or i17 %tmp21, %tmp5
23 %tmp5 = shl i577 %tmp, 8 ; <i577> [#uses=1]
24 ; CHECK: %tmp5 = shl i167 %a, 8
25 %tmp.upgrd.32 = or i577 %tmp21, %tmp5 ; <i577> [#uses=1]
26 ; CHECK: %tmp.upgrd.32 = or i167 %tmp21, %tmp5
2008-01-21-MulTrunc.ll 9 %tmp5 = mul i32 %tmp, 5 ; <i32> [#uses=1]
10 ; CHECK: %tmp5 = mul i16 %a, 5
11 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 ; <i32> [#uses=1]
12 ; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
onehot_merge.ll 11 %tmp5 = and i32 8, %k
12 %tmp6 = icmp eq i32 %tmp5, 0
30 %tmp5 = and i32 %tmp4, %k
31 %tmp6 = icmp eq i32 %tmp5, 0
bswap.ll 10 %tmp5 = or i32 %tmp1, %tmp4 ; <i32> [#uses=1]
13 %tmp9 = or i32 %tmp5, %tmp8 ; <i32> [#uses=1]
22 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
23 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
35 %tmp5 = or i16 %tmp2, %tmp4 ; <i16> [#uses=1]
36 ret i16 %tmp5
42 %tmp5 = or i16 %tmp4, %tmp2 ; <i16> [#uses=1]
43 ret i16 %tmp5
52 %tmp5 = shl i32 %tmp4, 8 ; <i32> [#uses=1]
53 %tmp5.upgrd.2 = trunc i32 %tmp5 to i16 ; <i16> [#uses=1
    [all...]
  /external/llvm/test/Transforms/NaryReassociate/
pr24301.ll 6 %tmp5 = add i32 %tmp4, 8
8 %tmp14 = add i32 %tmp13, 8 ; => %tmp5 + -128
  /external/llvm/test/CodeGen/ARM/
ifcvt2.ll 7 %tmp5 = icmp slt i32 %d, 4
8 %tmp8 = or i1 %tmp5, %tmp2
30 %tmp5 = icmp slt i32 %d, 4
31 %tmp8 = and i1 %tmp5, %tmp2
ldr_post.ll 12 %tmp5 = mul i32 %tmp4, %tmp3 ; <i32> [#uses=1]
13 ret i32 %tmp5
24 %tmp5 = mul i32 %tmp4, %tmp3 ; <i32> [#uses=1]
25 ret i32 %tmp5
uxtb.ll 37 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
38 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
46 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
47 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
54 %tmp5 = lshr i32 %x, 24 ; <i32> [#uses=1]
55 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
62 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
63 %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1]
71 %tmp5 = and i32 %tmp4, 458759 ; <i32> [#uses=1]
72 %tmp7 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1
    [all...]
vaba.ll 10 %tmp5 = add <8 x i8> %tmp1, %tmp4
11 ret <8 x i8> %tmp5
21 %tmp5 = add <4 x i16> %tmp1, %tmp4
22 ret <4 x i16> %tmp5
32 %tmp5 = add <2 x i32> %tmp1, %tmp4
33 ret <2 x i32> %tmp5
43 %tmp5 = add <8 x i8> %tmp1, %tmp4
44 ret <8 x i8> %tmp5
54 %tmp5 = add <4 x i16> %tmp1, %tmp4
55 ret <4 x i16> %tmp5
    [all...]
  /external/llvm/test/CodeGen/Thumb2/
thumb2-rev.ll 20 %tmp5 = or i16 %tmp2, %tmp4
21 %tmp5.upgrd.2 = sext i16 %tmp5 to i32
22 ret i32 %tmp5.upgrd.2
  /external/llvm/test/Analysis/CFLAliasAnalysis/
full-store-partial-alias.ll 6 ; so the %tmp5 load is PartialAlias with the store and suppress TBAA.
8 ; Without CFL AA, TBAA should say that %tmp5 is NoAlias with the store.
18 ; FIXME: This would be ret i32 %tmp5.lobit if CFLAA could prove PartialAlias
29 %tmp5 = load i32, i32* %arrayidx, align 4, !tbaa !3
30 %tmp5.lobit = lshr i32 %tmp5, 31
31 ret i32 %tmp5.lobit

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