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  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-cris/
hide1 0 TST1 { global: export_*; local: *; };
libdso-2.d 36 +2: 0+ +0 +OBJECT +GLOBAL +DEFAULT +ABS TST1
37 +3: 0+154 +0 +FUNC +GLOBAL +DEFAULT +7 export_1@@TST1
57 +16: 0+ +0 +OBJECT +GLOBAL +DEFAULT +ABS TST1
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/v850/
bit.s 8 tst1 5,16[r6]
v850e1.s 36 tst1 r0, [r31]
v850e1.d 42 0x0+76 ff 07 e6 00 [ ]*tst1 r0, \[lp\]
  /prebuilts/go/darwin-x86/test/fixedbugs/issue5470.dir/
a.go 11 func Test1() Foo { return make(tst1) }
13 type tst1 map[string]bool type
15 func (r tst1) Hi() string { return "Hi!" }
  /prebuilts/go/linux-x86/test/fixedbugs/issue5470.dir/
a.go 11 func Test1() Foo { return make(tst1) }
13 type tst1 map[string]bool type
15 func (r tst1) Hi() string { return "Hi!" }
  /external/llvm/test/CodeGen/ARM/
vsel.ll 6 %tst1 = icmp sgt i32 %lhs32, %rhs32
7 %val1 = select i1 %tst1, float %a, float %b
15 %tst1 = icmp sgt i32 %lhs32, %rhs32
16 %val1 = select i1 %tst1, double %a, double %b
24 %tst1 = icmp sge i32 %lhs32, %rhs32
25 %val1 = select i1 %tst1, float %a, float %b
33 %tst1 = icmp sge i32 %lhs32, %rhs32
34 %val1 = select i1 %tst1, double %a, double %b
42 %tst1 = icmp eq i32 %lhs32, %rhs32
43 %val1 = select i1 %tst1, float %a, float %
    [all...]
  /external/llvm/test/Transforms/InstCombine/
icmp-logical.ll 11 %tst1 = icmp ne i32 %mask1, 0
16 %res = and i1 %tst1, %tst2
28 %tst1 = icmp eq i32 %mask1, 0
33 %res = or i1 %tst1, %tst2
45 %tst1 = icmp ne i32 %mask1, 7
50 %res = and i1 %tst1, %tst2
62 %tst1 = icmp eq i32 %mask1, 7
67 %res = or i1 %tst1, %tst2
79 %tst1 = icmp ne i32 %mask1, %A
84 %res = and i1 %tst1, %tst
    [all...]
  /external/llvm/test/CodeGen/AArch64/
compare-branch.ll 10 %tst1 = icmp eq i32 %val1, 0
11 br i1 %tst1, label %end, label %test2
fp-cond-sel.ll 12 %tst1 = icmp ugt i32 %lhs32, %rhs32
13 %val1 = select i1 %tst1, float 0.0, float 1.0
fcmp.ll 8 %tst1 = fcmp oeq float %a, %b
9 br i1 %tst1, label %end, label %t2
47 %tst1 = fcmp oeq double %a, %b
48 br i1 %tst1, label %end, label %t2
arm64-ands-bad-peephole.ll 8 ; CHECK-LABEL: tst1:
11 define void @tst1(i1 %tst, i32 %true) {
tst-br.ll 22 %tst1 = icmp ne i32 %tbit1, 0
23 br i1 %tst1, label %test2, label %end1
cond-sel.ll 10 %tst1 = icmp ugt i32 %lhs32, %rhs32
11 %val1 = select i1 %tst1, i32 42, i32 52
32 %tst1 = fcmp one float %lhs32, %rhs32
35 %val1 = select i1 %tst1, i32 42, i32 52
62 %tst1 = icmp ugt i32 %lhs32, %rhs32
64 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
102 %tst1 = icmp ugt i32 %lhs32, %rhs32
104 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
142 %tst1 = icmp ugt i32 %lhs32, %rhs32
144 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs3
    [all...]
addsub-shifted.ll 197 %tst1 = icmp uge i32 %lhs32, %shift1
198 br i1 %tst1, label %t2, label %end
250 %tst1 = icmp uge i32 %lhs32, %val1
251 br i1 %tst1, label %t2, label %end
tbz-tbnz.ll 134 %tst1 = icmp slt i64 %and1, 0
135 br i1 %tst1, label %if.then1, label %if.end
logical_shifted_reg.ll 200 %tst1 = icmp sgt i64 %simple_and, 0
201 br i1 %tst1, label %ret, label %test2
  /external/llvm/test/CodeGen/X86/
sse-fcopysign.ll 8 define float @tst1(float %a, float %b) {
9 ; X32-LABEL: @tst1
18 ; X64-LABEL: @tst1
  /toolchain/binutils/binutils-2.25/include/elf/
v850.h 70 RELOC_NUMBER( R_V850_SDA_16_16_OFFSET, 9) /* For ld.b, st.b, set1, clr1, not1, tst1, movea, movhi */
72 RELOC_NUMBER( R_V850_ZDA_16_16_OFFSET, 11) /* For ld.b, st.b, set1, clr1, not1, tst1, movea, movhi */
77 RELOC_NUMBER( R_V850_TDA_16_16_OFFSET, 16) /* For set1, clr1, not1, tst1, movea, movhi */
  /external/elfutils/
.gitignore 89 /tests/asm-tst1
  /external/elfutils/tests/
asm-tst1.c 30 static const char fname[] = "asm-tst1-out.o";
  /toolchain/binutils/binutils-2.25/opcodes/
v850-dis.c 358 register argument, and the clr1/not1/set1/tst1 insns
403 || op->opcode == 0x00e607e0 /* tst1 */
  /external/v8/src/mips/
macro-assembler-mips.h 712 void Push(Register src, Condition cond, Register tst1, Register tst2) {
714 Branch(3, cond, tst1, Operand(tst2));
    [all...]
  /external/v8/src/mips64/
macro-assembler-mips64.h 750 void Push(Register src, Condition cond, Register tst1, Register tst2) {
752 Branch(3, cond, tst1, Operand(tst2));
    [all...]

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