| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| dc_only_idct_add_v6.asm | 35 uxtab16 r5, r0, r4 ; a1+2 | a1+0
36 uxtab16 r4, r0, r4, ror #8 ; a1+3 | a1+1
37 uxtab16 r7, r0, r6
38 uxtab16 r6, r0, r6, ror #8
50 uxtab16 r5, r0, r4
51 uxtab16 r4, r0, r4, ror #8
52 uxtab16 r7, r0, r6
53 uxtab16 r6, r0, r6, ror #8
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| dc_only_idct_add_v6.asm | 35 uxtab16 r5, r0, r4 ; a1+2 | a1+0
36 uxtab16 r4, r0, r4, ror #8 ; a1+3 | a1+1
37 uxtab16 r7, r0, r6
38 uxtab16 r6, r0, r6, ror #8
50 uxtab16 r5, r0, r4
51 uxtab16 r4, r0, r4, ror #8
52 uxtab16 r7, r0, r6
53 uxtab16 r6, r0, r6, ror #8
|
| intra4x4_predict_v6.asm | 154 uxtab16 r9, r9, r5 ;[a[1]+2*a[2]+a[3] | tl+2*a[0]+a[1] ]
156 uxtab16 r9, r9, r0 ;[a[1]+2*a[2]+a[3]+2| tl+2*a[0]+a[1]+2]
237 uxtab16 r4, r4, r12 ; [a2+2*a3+a4+2 | a0+2*a1+a2+2]
241 uxtab16 r5, r5, r12 ; [a3+2*a4+a5+2 | a1+2*a2+a3+2]
246 uxtab16 r6, r6, r12 ; [a6+2*a7+a7+2 | a4+2*a5+a6+2]
302 uxtab16 r4, r4, r12 ; [p2+2*p3+p4+2 | p0+2*p1+p2+2]
306 uxtab16 r5, r5, r12 ; [p3+2*p4+p5+2 | p1+2*p2+p3+2]
310 uxtab16 r6, r6, r12 ; [p5+2*p6+p7+2 | p3+2*p4+p5+2]
314 uxtab16 r7, r7, r12 ; [p6+2*p7+p8+2 | p4+2*p5+p6+2]
363 uxtab16 r5, r5, r12 ; [p3+2*p4+p5+2 | p1+2*p2+p3+2
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| armVCM4P10_InterpolateLuma_HalfHor4x4_unsafe_s.s | 112 UXTAB16 ValA, r0x00ff00ff, ValB ;// [00 a1 00 a0] + [0 255 0 255]
113 UXTAB16 ValC, r0x00ff00ff, ValD ;// [00 c1 00 c0] + [0 255 0 255]
117 UXTAB16 ValE, r0x00ff00ff, ValF ;// [00 e1 00 e0] + [0 255 0 255]
121 UXTAB16 Temp1, ValC, ValD, ROR #8
122 UXTAB16 Temp3, ValE, ValB, ROR #8
124 UXTAB16 Acc0, ValA, ValF, ROR #8
130 UXTAB16 Temp1, ValE, ValD, ROR #8
131 UXTAB16 Temp3, ValC, ValF, ROR #8
133 UXTAB16 ValG, r0x00ff00ff, ValH ;// [00 g1 00 g0] + [0 255 0 255]
135 UXTAB16 Acc1, ValG, ValB, ROR #
[all...] |
| armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.s | 123 UXTAB16 ValC0, r0x00ff00ff, ValC ;// [0 c2 0 c0] + [0 255 0 255]
124 UXTAB16 ValC1, r0x00ff00ff, ValC, ROR #8 ;// [0 c3 0 c1] + [0 255 0 255]
126 UXTAB16 ValE0, r0x00ff00ff, ValE ;// [0 e2 0 e0] + [0 255 0 255]
127 UXTAB16 ValE1, r0x00ff00ff, ValE, ROR #8 ;// [0 e3 0 e1] + [0 255 0 255]
128 UXTAB16 ValCD0, ValC0, ValD ;// [0 c2 0 c0] + [0 255 0 255] + [0 d2 0 d0]
129 UXTAB16 ValCD1, ValC1, ValD, ROR #8 ;// [0 c3 0 c1] + [0 255 0 255] + [0 d3 0 d1]
130 UXTAB16 ValEB0, ValE0, ValB ;// [0 e2 0 e0] + [0 255 0 255] + [0 b2 0 b0]
134 UXTAB16 ValEB1, ValE1, ValB, ROR #8 ;// [0 e3 0 e1] + [0 255 0 255] + [0 b3 0 b1]
137 UXTAB16 ValED0, ValE0, ValD ;// [0 e2 0 e0] + [0 255 0 255] + [0 d2 0 d0]
138 UXTAB16 ValED1, ValE1, ValD, ROR #8 ;// [0 e3 0 e1] + [0 255 0 255] + [0 d3 0 d1] (…)
[all...] |
| armVCM4P10_InterpolateLuma_HalfDiagVerHor4x4_unsafe_s.s | 151 UXTAB16 ValC0, r0x00ff00ff, ValC ;// [0 c2 0 c0] + [0 255 0 255]
152 UXTAB16 ValC1, r0x00ff00ff, ValC, ROR #8 ;// [0 c3 0 c1] + [0 255 0 255]
154 UXTAB16 ValE0, r0x00ff00ff, ValE ;// [0 e2 0 e0] + [0 255 0 255]
155 UXTAB16 ValE1, r0x00ff00ff, ValE, ROR #8 ;// [0 e3 0 e1] + [0 255 0 255]
156 UXTAB16 ValCD0, ValC0, ValD ;// [0 c2 0 c0] + [0 255 0 255] + [0 d2 0 d0]
157 UXTAB16 ValCD1, ValC1, ValD, ROR #8 ;// [0 c3 0 c1] + [0 255 0 255] + [0 d3 0 d1]
158 UXTAB16 ValEB0, ValE0, ValB ;// [0 e2 0 e0] + [0 255 0 255] + [0 b2 0 b0]
162 UXTAB16 ValEB1, ValE1, ValB, ROR #8 ;// [0 e3 0 e1] + [0 255 0 255] + [0 b3 0 b1]
165 UXTAB16 ValED0, ValE0, ValD ;// [0 e2 0 e0] + [0 255 0 255] + [0 d2 0 d0]
166 UXTAB16 ValED1, ValE1, ValD, ROR #8 ;// [0 e3 0 e1] + [0 255 0 255] + [0 d3 0 d1] (…)
[all...] |
| armVCM4P10_InterpolateLuma_HalfDiagHorVer4x4_unsafe_s.s | 136 UXTAB16 ValA, r0x00ff00ff, ValB ;// [00 a1 00 a0] + [0 255 0 255]
137 UXTAB16 ValC, r0x00ff00ff, ValD ;// [00 c1 00 c0] + [0 255 0 255]
141 UXTAB16 ValE, r0x00ff00ff, ValF ;// [00 e1 00 e0] + [0 255 0 255]
145 UXTAB16 Temp1, ValC, ValD, ROR #8
146 UXTAB16 Temp3, ValE, ValB, ROR #8
148 UXTAB16 Acc0, ValA, ValF, ROR #8
154 UXTAB16 Temp1, ValE, ValD, ROR #8
155 UXTAB16 Temp3, ValC, ValF, ROR #8
157 UXTAB16 ValG, r0x00ff00ff, ValH ;// [00 g1 00 g0] + [0 255 0 255]
159 UXTAB16 Acc1, ValG, ValB, ROR #
[all...] |
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 225 UXTAB16 tunpk0, tunpk0, row1, ROR#8
226 UXTAB16 tunpk6, tunpk6, row1
229 UXTAB16 tunpk2, tunpk2, row3, ROR#8
230 UXTAB16 tunpk3, tunpk3, row3
272 UXTAB16 tunpk4, tunpk4, row5, ROR#8
273 UXTAB16 tunpk5, tunpk5, row5
276 UXTAB16 tunpk6, tunpk6, row7, ROR#8
277 UXTAB16 tunpk7, tunpk7, row7
364 UXTAB16 tunpk0, tunpk0, P1b, ROR#8
365 UXTAB16 tunpk2, tunpk2, P1
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
| h264bsd_interpolate_ver_half.s | 159 UXTAB16 tmpa, tmpa, tmp4 ;// |g3+m3|g1+m1|
163 UXTAB16 tmpb, tmpb, tmp5 ;// |c3+r3|c1+r1|
165 UXTAB16 tmpa, tmpa, tmp1 ;// 16+20(G+M)+A
166 UXTAB16 tmpa, tmpa, tmp6 ;// 16+20(G+M)+A+T
174 UXTAB16 tmpa, tmpa, tmp4, ROR #8 ;// |g4+m4|g2+m2|
180 UXTAB16 tmpb, tmpb, tmp5, ROR #8 ;// |c4+r4|c2+r2|
181 UXTAB16 tmpa, tmpa, tmp1, ROR #8 ;// 16+20(G+M)+A
182 UXTAB16 tmpa, tmpa, tmp6, ROR #8 ;// 16+20(G+M)+A+T
204 UXTAB16 tmpa, tmpa, tmp5 ;// |g3+m3|g1+m1|
207 UXTAB16 tmpb, tmpb, tmp6 ;// |c3+r3|c1+r1
[all...] |
| h264bsd_interpolate_ver_quarter.s | 160 UXTAB16 tmpa, tmpa, tmp4 ;// |g3+m3|g1+m1|
164 UXTAB16 tmpb, tmpb, tmp5 ;// |c3+r3|c1+r1|
166 UXTAB16 tmpa, tmpa, tmp1 ;// 16+20(G+M)+A
167 UXTAB16 tmpa, tmpa, tmp6 ;// 16+20(G+M)+A+T
175 UXTAB16 tmpa, tmpa, tmp4, ROR #8 ;// |g4+m4|g2+m2|
181 UXTAB16 tmpb, tmpb, tmp5, ROR #8 ;// |c4+r4|c2+r2|
182 UXTAB16 tmpa, tmpa, tmp1, ROR #8 ;// 16+20(G+M)+A
183 UXTAB16 tmpa, tmpa, tmp6, ROR #8 ;// 16+20(G+M)+A+T
213 UXTAB16 tmpa, tmpa, tmp5 ;// |g3+m3|g1+m1|
216 UXTAB16 tmpb, tmpb, tmp6 ;// |c3+r3|c1+r1
[all...] |
| h264bsd_interpolate_hor_ver_quarter.s | 324 UXTAB16 tmpa, tmpa, tmp4 ;// |g3+m3|g1+m1|
328 UXTAB16 tmpb, tmpb, tmp5 ;// |c3+r3|c1+r1|
330 UXTAB16 tmpa, tmpa, tmp1 ;// 16+20(G+M)+A
331 UXTAB16 tmpa, tmpa, tmp6 ;// 16+20(G+M)+A+T
339 UXTAB16 tmpa, tmpa, tmp4, ROR #8 ;// |g4+m4|g2+m2|
345 UXTAB16 tmpb, tmpb, tmp5, ROR #8 ;// |c4+r4|c2+r2|
346 UXTAB16 tmpa, tmpa, tmp1, ROR #8 ;// 16+20(G+M)+A
347 UXTAB16 tmpa, tmpa, tmp6, ROR #8 ;// 16+20(G+M)+A+T
376 UXTAB16 tmpa, tmpa, tmp5 ;// |g3+m3|g1+m1|
379 UXTAB16 tmpb, tmpb, tmp6 ;// |c3+r3|c1+r1
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumb2-dsp-diag.s | 22 uxtab16 r0, r0, r0 label
32 @ CHECK-7EM: uxtab16 r0, r0, r0 @ encoding: [0x30,0xfa,0x80,0xf0]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| unpredictable-AExtI-arm.txt | 61 # CHECK: uxtab16
|
| thumb-tests.txt | 99 # CHECK: uxtab16 r1, r2, r3, ror #8
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| archv6.s | 153 uxtab16 r2, r3, r5
154 uxtab16 r2, r3, r5, ROR #8
|
| thumb2_bad_reg.s | 955 @ UXTAB16
956 uxtab16 r13, r0, r1
957 uxtab16 r15, r0, r1
958 uxtab16 r0, r13, r1
959 uxtab16 r0, r15, r1
960 uxtab16 r0, r1, r13
961 uxtab16 r0, r1, r15
|
| arch7em.s | 156 uxtab16 r1, r2, r3
|
| archv6.d | 156 0+250 <[^>]*> e6c32075 ? uxtab16 r2, r3, r5
157 0+254 <[^>]*> e6c32475 ? uxtab16 r2, r3, r5, ror #8
|
| arch7em-bad.l | 131 [^:]*:156: Error: selected processor does not support Thumb mode `uxtab16 r1,r2,r3'
|
| arch7em.d | 138 0[0-9a-f]+ <[^>]+> fa32 f183 uxtab16 r1, r2, r3
|
| thumb2_bad_reg.l | [all...] |
| /external/valgrind/none/tests/arm/ |
| v6media.c | [all...] |
| /prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/arm/armasm/ |
| tables.go | 3362 UXTAB16
[all...] |
| /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/arm/armasm/ |
| tables.go | 3362 UXTAB16
[all...] |
| /device/google/contexthub/firmware/inc/platform/stm32f4xx/cmsis/ |
| core_cmSimd.h | 467 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
