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  /external/mesa3d/src/gallium/drivers/radeon/
SIAssignInterpRegs.cpp 113 unsigned virt_reg = MRI.createVirtualRegister(&AMDGPU::VReg_32RegClass); local
114 MRI.replaceRegWith(InterpUse[interp_idx].regs[reg_idx], virt_reg);
115 AddLiveIn(&MF, MRI, new_reg, virt_reg);

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