| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| neon-const.s | 7 vmov.f32 q0, 0.0
9 vmov.f32 q0, 2.0
10 vmov.f32 q0, 4.0
11 vmov.f32 q0, 8.0
12 vmov.f32 q0, 16.0
13 vmov.f32 q0, 0.125
14 vmov.f32 q0, 0.25
15 vmov.f32 q0, 0.5
16 vmov.f32 q0, 1.0
18 vmov.f32 q0, 2.12
[all...] |
| neon-vmov-bad.s | 3 vmov Q0, d0
|
| neon-vmov-bad.d | 1 # name: Bad shape for vmov
3 # error-output: neon-vmov-bad.l
|
| vfp2.d | 10 0+000 <[^>]*> ec4a5b10 vmov d0, r5, sl
11 0+004 <[^>]*> ec5a5b10 vmov r5, sl, d0
12 0+008 <[^>]*> ec4a5a37 (vmov s15, s16, r5, sl|fmsrr {s15, s16}, r5, sl)
13 0+00c <[^>]*> ec5a5a37 (vmov r5, sl, s15, s16|fmrrs r5, sl, {s15, s16})
14 0+010 <[^>]*> ec45ab1f vmov d15, sl, r5
15 0+014 <[^>]*> ec55ab1f vmov sl, r5, d15
16 0+018 <[^>]*> ec45aa38 (vmov s17, s18, sl, r5|fmsrr {s17, s18}, sl, r5)
17 0+01c <[^>]*> ec55aa38 (vmov sl, r5, s17, s18|fmrrs sl, r5, {s17, s18})
|
| vfp2_t2.d | 10 0+000 <[^>]*> ec4a 5b10 vmov d0, r5, sl
11 0+004 <[^>]*> ec5a 5b10 vmov r5, sl, d0
12 0+008 <[^>]*> ec4a 5a37 (vmov s15, s16, r5, sl|fmsrr {s15, s16}, r5, sl)
13 0+00c <[^>]*> ec5a 5a37 (vmov r5, sl, s15, s16|fmrrs r5, sl, {s15, s16})
14 0+010 <[^>]*> ec45 ab1f vmov d15, sl, r5
15 0+014 <[^>]*> ec55 ab1f vmov sl, r5, d15
16 0+018 <[^>]*> ec45 aa38 (vmov s17, s18, sl, r5|fmsrr {s17, s18}, sl, r5)
17 0+01c <[^>]*> ec55 aa38 (vmov sl, r5, s17, s18|fmrrs sl, r5, {s17, s18})
|
| neon-const.d | 8 0[0-9a-f]+ <[^>]+> f2800050 vmov\.i32 q0, #0 ; 0x00000000
9 0[0-9a-f]+ <[^>]+> f2800f50 vmov\.f32 q0, #2 ; 0x40000000
10 0[0-9a-f]+ <[^>]+> f2810f50 vmov\.f32 q0, #4 ; 0x40800000
11 0[0-9a-f]+ <[^>]+> f2820f50 vmov\.f32 q0, #8 ; 0x41000000
12 0[0-9a-f]+ <[^>]+> f2830f50 vmov\.f32 q0, #16 ; 0x41800000
13 0[0-9a-f]+ <[^>]+> f2840f50 vmov\.f32 q0, #0\.125 ; 0x3e000000
14 0[0-9a-f]+ <[^>]+> f2850f50 vmov\.f32 q0, #0\.25 ; 0x3e800000
15 0[0-9a-f]+ <[^>]+> f2860f50 vmov\.f32 q0, #0\.5 ; 0x3f000000
16 0[0-9a-f]+ <[^>]+> f2870f50 vmov\.f32 q0, #1 ; 0x3f800000
17 0[0-9a-f]+ <[^>]+> f2800f51 vmov\.f32 q0, #2\.125 ; 0x4008000
[all...] |
| vfp-neon-overlap.s | 8 vmov d0,r0,r1
10 vmov r0,r1,d0
35 vmov.32 r0,d0[1]
37 vmov.32 r0,d0[0]
39 vmov.32 d0[1],r0
41 vmov.32 d0[0],r0
|
| neon-vmov-bad.l | 2 [^:]*:3: Error: invalid instruction shape -- `vmov Q0,d0'
|
| vldconst.d | 89 00000140 <foo\+0x140> f2800e30 vmov.i64 d0, #0x0000000000000000
90 00000144 <foo\+0x144> f280ee30 vmov.i64 d14, #0x0000000000000000
91 00000148 <foo\+0x148> f2c0ce30 vmov.i64 d28, #0x0000000000000000
92 0000014c <foo\+0x14c> f2c0fe30 vmov.i64 d31, #0x0000000000000000
97 00000160 <foo\+0x160> f3870e3f vmov.i64 d0, #0xffffffffffffffff
98 00000164 <foo\+0x164> f387ee3f vmov.i64 d14, #0xffffffffffffffff
99 00000168 <foo\+0x168> f3c7ce3f vmov.i64 d28, #0xffffffffffffffff
100 0000016c <foo\+0x16c> f3c7fe3f vmov.i64 d31, #0xffffffffffffffff
109 00000190 <foo\+0x190> f2800e30 vmov.i64 d0, #0x0000000000000000
110 00000194 <foo\+0x194> f280ee30 vmov.i64 d14, #0x000000000000000
[all...] |
| vldconst_be.d | 90 00000140 <foo\+0x140> f2800e30 vmov.i64 d0, #0x0000000000000000
91 00000144 <foo\+0x144> f280ee30 vmov.i64 d14, #0x0000000000000000
92 00000148 <foo\+0x148> f2c0ce30 vmov.i64 d28, #0x0000000000000000
93 0000014c <foo\+0x14c> f2c0fe30 vmov.i64 d31, #0x0000000000000000
98 00000160 <foo\+0x160> f3870e3f vmov.i64 d0, #0xffffffffffffffff
99 00000164 <foo\+0x164> f387ee3f vmov.i64 d14, #0xffffffffffffffff
100 00000168 <foo\+0x168> f3c7ce3f vmov.i64 d28, #0xffffffffffffffff
101 0000016c <foo\+0x16c> f3c7fe3f vmov.i64 d31, #0xffffffffffffffff
110 00000190 <foo\+0x190> f2800e30 vmov.i64 d0, #0x0000000000000000
111 00000194 <foo\+0x194> f280ee30 vmov.i64 d14, #0x000000000000000
[all...] |
| neon-psyn.s | 29 vmov foo, bar
30 vmov d2.s16[1], r1
31 vmov d5.s32[1], r1
32 vmov foo, r2, r3
33 vmov r4, foos.s8
34 vmov r5, r6, foo
58 vmov r0,d0.s16[0]
|
| /external/llvm/test/MC/ARM/ |
| vmov-vmvn-byte-replicate.s | 1 @ PR18921, "vmov" part.
5 @ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3]
6 @ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
7 @ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
8 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
9 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
10 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
12 @ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
13 @ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
14 @ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2
[all...] |
| neon-mov-vfp.s | 9 @ CHECK-DAG: vmov.32 d13[0], r6 @ encoding:
10 @ CHECK-DAG: vmov.32 d17[1], r9 @ encoding:
11 vmov.32 d13[0], r6
12 vmov.32 d17[1], r9
16 @ NEON-DAG: vmov.8 d22[5], r2 @ encoding:
17 @ NEON-DAG: vmov.16 d3[2], r4 @ encoding:
18 vmov.8 d22[5], r2
19 vmov.16 d3[2], r4
21 @ CHECK-DAG: vmov.32 r6, d13[0] @ encoding:
22 @ CHECK-DAG: vmov.32 r9, d17[1] @ encoding
[all...] |
| neont2-mov-encoding.s | 5 vmov.i8 d16, #0x8
6 vmov.i16 d16, #0x10
7 vmov.i16 d16, #0x1000
8 vmov.i32 d16, #0x20
9 vmov.i32 d16, #0x2000
10 vmov.i32 d16, #0x200000
11 vmov.i32 d16, #0x20000000
12 vmov.i32 d16, #0x20FF
13 vmov.i32 d16, #0x20FFFF
14 vmov.i64 d16, #0xFF0000FF0000FFF
[all...] |
| vmov-vmvn-illegal-cases.s | 5 @ CHECK: vmov.i32 d2, #0xffffffab
7 @ CHECK: vmov.i32 q2, #0xffffffab
9 @ CHECK: vmov.i16 q2, #0xffab
11 @ CHECK: vmov.i16 q2, #0xffab
22 vmov.i32 d2, #0xffffffab
23 vmov.i32 q2, #0xffffffab
24 vmov.i16 q2, #0xffab
25 vmov.i16 q2, #0xffab
|
| fp-const-errors.s | 4 vmov.f32 s2, #32.0
7 vmov.f64 d2, #32.0
10 @ Test that vmov.f instructions do not accept an 8-bit encoded float as an operand
11 vmov.f32 s1, #0x70
14 vmov.f64 d2, #0x70
|
| diagnostics-noneon.s | 4 vmov d5, d10
5 vmov q4, q5
|
| neon-mov-encoding.s | 3 vmov.i8 d16, #0x8
4 vmov.i16 d16, #0x10
5 vmov.i16 d16, #0x1000
6 vmov.i32 d16, #0x20
7 vmov.i32 d16, #0x2000
8 vmov.i32 d16, #0x200000
9 vmov.i32 d16, #0x20000000
10 vmov.i32 d16, #0x20FF
11 vmov.i32 d16, #0x20FFFF
12 vmov.i64 d16, #0xFF0000FF0000FFF
[all...] |
| simple-fp-encoding.s | 144 vmov.f32 r1, s2
145 vmov.f32 s4, r3
146 vmov.f64 r1, r5, d2
147 vmov.f64 d4, r3, r9
149 @ CHECK: vmov r1, s2 @ encoding: [0x10,0x1a,0x11,0xee]
150 @ CHECK: vmov s4, r3 @ encoding: [0x10,0x3a,0x02,0xee]
151 @ CHECK: vmov r1, r5, d2 @ encoding: [0x12,0x1b,0x55,0xec]
152 @ CHECK: vmov d4, r3, r9 @ encoding: [0x14,0x3b,0x49,0xec]
176 vmov.f64 d16, #3.000000e+00
177 vmov.f32 s0, #3.000000e+0
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vfp-reg-stride.ll | 7 ; CHECK-STRIDE4-DAG: vmov d16, r
8 ; CHECK-STRIDE4-DAG: vmov d18, r
11 ; CHECK-STRIDE4-WATCH-DAG: vmov.f64 d16, d
12 ; CHECK-STRIDE4-WATCH-DAG: vmov.f64 d18, d
15 ; CHECK-GENERIC-DAG: vmov.f64 d16, {{d[01]}}
16 ; CHECK-GENERIC-DAG: vmov.f64 d17, {{d[01]}}
25 ; CHECK-STRIDE4: vmov d2, {{r[01]}}
26 ; CHECK-STRIDE4: vmov d3, {{r[01]}}
29 ; CHECK-STRIDE4-WATCH-DAG: vmov.f32 s4, {{s[01]}}
30 ; CHECK-STRIDE4-WATCH-DAG: vmov.f32 s8, {{s[01]}
[all...] |
| fp.ll | 5 ;CHECK: vmov
7 ;CHECK-NEXT: vmov
15 ;CHECK: vmov
17 ;CHECK-NEXT: vmov
25 ;CHECK: vmov
27 ;CHECK-NEXT: vmov
35 ;CHECK: vmov
37 ;CHECK-NEXT: vmov
46 ;CHECK-NEXT: vmov
61 ;CHECK-NOT: vmov
[all...] |
| 2012-05-04-vmov.ll | 7 ; Check that swift doesn't use vmov.32. <rdar://problem/10453003>.
13 ; A9-CHECK: vmov.32
14 ; vmov.32 should not be used to get a lane:
15 ; vmov.32 <dst>, <src>[<lane>].
16 ; but vmov.32 <dst>[<lane>], <src> is fine.
17 ; SWIFT-CHECK-NOT: vmov.32 {{r[0-9]+}}, {{d[0-9]\[[0-9]+\]}}
|
| vcombine.ll | 9 ; CHECK-LE-DAG: vmov r0, r1, [[LD0]]
10 ; CHECK-LE-DAG: vmov r2, r3, [[LD1]]
12 ; CHECK-BE-DAG: vmov r1, r0, d16
13 ; CHECK-BE-DAG: vmov r3, r2, d17
25 ; CHECK-LE-DAG: vmov r0, r1, [[LD0]]
26 ; CHECK-LE-DAG: vmov r2, r3, [[LD1]]
28 ; CHECK-BE-DAG: vmov r1, r0, d16
29 ; CHECK-BE-DAG: vmov r3, r2, d17
42 ; CHECK-LE: vmov r0, r1, [[LD0]]
43 ; CHECK-LE: vmov r2, r3, [[LD1]
[all...] |
| big-endian-vector-callee.ll | 6 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
19 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
32 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
45 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
58 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
71 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
91 ; SOFT: vmov r1, r0, [[REG]]
97 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
105 ; SOFT: vmov r1, r0, [[REG]]
111 ; SOFT: vmov [[REG:d[0-9]+]], r1, r
[all...] |
| peephole-bitcast.ll | 5 ; vmov s0, r0 + vmov r0, s0 should have been optimized away.
14 ; CHECK-NOT: vmov
|
