| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/sh64/ |
| crange-2g.s | 7 movi 0x21,r12
26 movi 0x21,r13
|
| /external/boringssl/linux-aarch64/crypto/bn/ |
| armv8-mont.S | 16 stp x21,x22,[sp,#32]
28 sub x21,x5,#16 // j=num-2
52 cbz x21,.L1st_skip
57 sub x21,x21,#8 // j--
71 cbnz x21,.L1st
96 sub x21,x5,#16 // j=num-2
113 cbz x21,.Linner_skip
120 sub x21,x21,#8 // j-
[all...] |
| /external/llvm/test/MC/ARM/ |
| mul-v4.s | 23 @ ARMV4: smlal r2, r3, r0, r1 @ encoding: [0x90,0x21,0xe3,0xe0]
24 @ ARMV4: smlals r2, r3, r0, r1 @ encoding: [0x90,0x21,0xf3,0xe0]
25 @ ARMV4: smlalne r2, r3, r0, r1 @ encoding: [0x90,0x21,0xe3,0x10]
26 @ ARMV4: smlalseq r2, r3, r0, r1 @ encoding: [0x90,0x21,0xf3,0x00]
32 @ ARMV4: umlal r2, r3, r0, r1 @ encoding: [0x90,0x21,0xa3,0xe0]
33 @ ARMV4: umlals r2, r3, r0, r1 @ encoding: [0x90,0x21,0xb3,0xe0]
34 @ ARMV4: umlalne r2, r3, r0, r1 @ encoding: [0x90,0x21,0xa3,0x10]
35 @ ARMV4: umlalseq r2, r3, r0, r1 @ encoding: [0x90,0x21,0xb3,0x00]
|
| neont2-shuffle-encoding.s | 33 @ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21]
35 @ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21]
37 @ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21]
43 @ CHECK: vzip.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x21]
45 @ CHECK: vzip.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x21]
47 @ CHECK: vzip.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x21]
|
| neont2-sub-encoding.s | 31 @ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21]
33 @ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21]
35 @ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21]
41 @ CHECK: vzip.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x21]
43 @ CHECK: vzip.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x21]
45 @ CHECK: vzip.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x21]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| crc32.txt | 11 0x42 0x00 0x21 0xe1
14 0x42 0x02 0x21 0xe1
|
| /external/boringssl/linux-aarch64/crypto/sha/ |
| sha512-armv8.S | 15 stp x21,x22,[sp,#32]
21 ldp x20,x21,[x0] // load context
32 eor x28,x21,x22 // magic seed
44 eor x19,x20,x21 // a^b, b^c in next round
52 eor x28,x28,x21 // Maj(a,b,c)
100 add x21,x21,x25 // d+=h
111 ror x16,x21,#14
113 eor x9,x21,x21,ror#2
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
| reloc-2.d | 18 .*: 3c040021 lui a0,0x21
20 .*: 3c040021 lui a0,0x21
22 .*: 3c040021 lui a0,0x21
31 .*: 3c040021 lui a0,0x21
33 .*: 3c040021 lui a0,0x21
35 .*: 3c040021 lui a0,0x21
44 .*: 3c040021 lui a0,0x21
46 .*: 3c040021 lui a0,0x21
48 .*: 3c040021 lui a0,0x21
93 .*: 3c040021 lui a0,0x21
[all...] |
| /external/llvm/test/MC/Mips/ |
| mips64-expansions.s | 13 # CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
15 # CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
21 # CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
23 # CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
25 # CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34]
32 # CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
34 # CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34]
40 # CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
42 # CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34]
44 # CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34
[all...] |
| macro-la.s | 75 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
82 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
84 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
86 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
88 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
90 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
92 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
94 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
96 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
100 # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21]
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
| invalid.txt | 4 0x21 0xe2 0x5c 0x71 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| cdr.s | 10 .byte 0x21
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-aarch64/ |
| eh-frame-bar.s | 6 .cfi_offset x21, 16
22 ldp x21, x22, [x0, #16]
|
| /external/clang/test/CodeGen/ |
| init-with-member-expr.c | 16 const mark_header_t rar_hdr[2] = {{0x52, 0x61, 0x72, 0x21, 0x1a, 0x07, 0x00}, {'U', 'n', 'i', 'q', 'u', 'E', '!'}};
|
| /external/lzma/CPP/7zip/Compress/ |
| Lzma2Register.cpp | 18 { CreateCodec, CreateCodecOut, 0x21, L"LZMA2", 1, false };
|
| /external/lzma/Java/Tukaani/src/org/tukaani/xz/ |
| LZMA2Coder.java | 13 public static final long FILTER_ID = 0x21;
|
| /external/llvm/test/CodeGen/BPF/ |
| shifts.ll | 6 ; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
14 ; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
22 ; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
30 ; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
38 ; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
46 ; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
54 ; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
63 ; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
71 ; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
79 ; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| msdaora.h | 13 EXTERN_C const CLSID CLSID_MSDAORA8 = {0x7f06a373,0xdd6a,0x43db,{0xb4,0xe0,0x1f,0xc1,0x21,0xe5,0xe6,0x2b}};
14 EXTERN_C const CLSID CLSID_MSDAORA8_ERROR = {0x7f06a374,0xdd6a,0x43db,{0xb4,0xe0,0x1f,0xc1,0x21,0xe5,0xe6,0x2b}};
29 extern const GUID OLEDBDECLSPEC DBPROPSET_MSDAORA8_ROWSET = {0x7f06a375,0xdd6a,0x43db,{0xb4,0xe0,0x1f,0xc1,0x21,0xe5,0xe6,0x2b}};
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-register-pairing.ll | 14 ; CHECK: stp x22, x21, [sp, #112]
18 ; CHECK: ldp x22, x21, [sp, #112]
26 call void asm sideeffect "mov x0, #42", "~{x0},~{x19},~{x21},~{x23},~{x25},~{x27},~{d8},~{d10},~{d12},~{d14}"() nounwind
39 ; CHECK: stp x22, x21, [sp, #112]
43 ; CHECK: ldp x22, x21, [sp, #112]
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| ppc64-encoding-vmx.txt | 19 0x7c 0x43 0x21 0x0e
22 0x7c 0x43 0x21 0x4e
25 0x7c 0x43 0x21 0x8e
28 0x7c 0x43 0x21 0xce
43 0x10 0x43 0x21 0x8e
46 0x10 0x43 0x21 0x0e
49 0x10 0x43 0x21 0xce
52 0x10 0x43 0x21 0x4e
94 0x10 0x43 0x21 0x0c
97 0x10 0x43 0x21 0x4
[all...] |
| ppc64-encoding-ext.txt | 162 0x4e 0x80 0x00 0x21
165 0x4e 0x80 0x04 0x21
174 0x4d 0x82 0x00 0x21
177 0x4d 0x82 0x04 0x21
186 0x4d 0xe2 0x00 0x21
189 0x4d 0xe2 0x04 0x21
198 0x4d 0xc2 0x00 0x21
201 0x4d 0xc2 0x04 0x21
210 0x4c 0x82 0x00 0x21
213 0x4c 0x82 0x04 0x21
[all...] |
| ppc64-encoding.txt | 26 0x4c 0x8a 0x18 0x21
29 0x4c 0x8a 0x00 0x21
38 0x4c 0x8a 0x1c 0x21
41 0x4c 0x8a 0x04 0x21
47 0x4c 0x43 0x21 0xc2
53 0x4c 0x43 0x21 0x82
62 0x4c 0x43 0x21 0x02
158 0x7c 0x43 0x21 0xae
164 0x7c 0x43 0x21 0xee
182 0x7c 0x43 0x21 0x2
[all...] |
| ppc64le-encoding.txt | 26 0x21 0x18 0x8a 0x4c
29 0x21 0x00 0x8a 0x4c
38 0x21 0x1c 0x8a 0x4c
41 0x21 0x04 0x8a 0x4c
47 0xc2 0x21 0x43 0x4c
53 0x82 0x21 0x43 0x4c
62 0x02 0x21 0x43 0x4c
158 0xae 0x21 0x43 0x7c
164 0xee 0x21 0x43 0x7c
182 0x2e 0x21 0x43 0x7
[all...] |
| /external/valgrind/none/tests/amd64-solaris/ |
| coredump_single_thread_sse.c | 12 "\x23\x45\x67\x89\x09\x87\x65\x43\x21\xfe\xdc\xba\x94\x67\xfe\xca"
14 "\x03\x05\x06\x08\x1d\x1b\x4b\x15\x25\x27\x21\x20\x37\x3a\x3d\x35"
16 "\x94\x67\xfe\xca\x23\x45\x67\x89\x21\xfe\xdc\xba\x09\x87\x65\x43"
18 "\x37\x3a\x3d\x35\x1d\x1b\x4b\x15\x03\x05\x06\x08\x25\x27\x21\x20"
22 "\x10\x60\x6d\x52\xa2\xd7\x75\x21\x35\x08\xfa\xe5\xa3\x4b\x5c\x9d"
23 "\xab\x87\x21\xbe\xb0\xbc\x32\x72\x2c\x22\x00\x6f\xf5\x63\x80\x6e"
|
| /external/valgrind/none/tests/arm64/ |
| memory.c | 128 TESTINST2_hide2("ldr x21, [x22, #24]", AREA_MID, x21,x22,0);
129 TESTINST2_hide2("ldr w21, [x22, #20]", AREA_MID, x21,x22,0);
130 TESTINST2_hide2("ldrh w21, [x22, #44]", AREA_MID, x21,x22,0);
131 TESTINST2_hide2("ldrb w21, [x22, #56]", AREA_MID, x21,x22,0);
135 TESTINST2_hide2("ldr x21, [x22], #-24", AREA_MID, x21,x22,0);
136 TESTINST2_hide2("ldr x21, [x22, #-40]!", AREA_MID, x21,x22,0);
137 TESTINST2_hide2("ldr x21, [x22, #-48]", AREA_MID, x21,x22,0)
[all...] |
