Lines Matching refs:out_reg
3313 Register out_reg = out.AsRegister<Register>();
3318 __ and_(out_reg, second_reg, ShifterOperand(kMaxIntShiftDistance));
3320 __ Lsl(out_reg, first_reg, out_reg);
3322 __ Asr(out_reg, first_reg, out_reg);
3324 __ Lsr(out_reg, first_reg, out_reg);
3330 __ Mov(out_reg, first_reg);
3332 __ Lsl(out_reg, first_reg, shift_value);
3334 __ Asr(out_reg, first_reg, shift_value);
3336 __ Lsr(out_reg, first_reg, shift_value);
4083 DRegister out_reg = FromLowSToD(out.AsFpuRegisterPairLow<SRegister>());
4089 __ vmovdrr(out_reg, lo, hi);
4091 __ LoadDFromOffset(out_reg, base, offset);
5792 Register out_reg = out.AsRegister<Register>();
5796 __ bic(out_reg, first_reg, second_reg);
5799 __ orn(out_reg, first_reg, second_reg);
5900 Register out_reg = out.AsRegister<Register>();
5902 GenerateAndConst(out_reg, first_reg, value_low);
5904 GenerateOrrConst(out_reg, first_reg, value_low);
5907 GenerateEorConst(out_reg, first_reg, value_low);
5934 Register out_reg = out.AsRegister<Register>();
5936 __ and_(out_reg, first_reg, second_reg);
5938 __ orr(out_reg, first_reg, second_reg);
5941 __ eor(out_reg, first_reg, second_reg);
5969 Register out_reg = out.AsRegister<Register>();
5976 instruction, out, out_reg, offset, maybe_temp, /* needs_null_check */ false);
5982 __ Mov(maybe_temp.AsRegister<Register>(), out_reg);
5984 __ LoadFromOffset(kLoadWord, out_reg, out_reg, offset);
5990 __ LoadFromOffset(kLoadWord, out_reg, out_reg, offset);
5991 __ MaybeUnpoisonHeapReference(out_reg);
6000 Register out_reg = out.AsRegister<Register>();
6012 __ LoadFromOffset(kLoadWord, out_reg, obj_reg, offset);
6018 __ LoadFromOffset(kLoadWord, out_reg, obj_reg, offset);
6019 __ MaybeUnpoisonHeapReference(out_reg);
