Lines Matching defs:SP
611 __ LoadFromOffset(kLoadWord, reg, SP, offset);
612 __ StoreToOffset(kStoreWord, TMP, SP, offset);
624 __ LoadFromOffset(kLoadWord, reg_l, SP, offset_l);
625 __ StoreToOffset(kStoreWord, TMP, SP, offset_l);
627 __ LoadFromOffset(kLoadWord, reg_h, SP, offset_h);
628 __ StoreToOffset(kStoreWord, TMP, SP, offset_h);
647 // If V0 spills onto the stack, SP-relative offsets need to be adjusted.
652 SP,
656 SP,
660 SP,
662 __ StoreToOffset(kStoreWord, TMP, SP, index1 + stack_offset);
680 SP,
698 // TODO: increment/decrement SP in one step instead of two or remove this comment.
709 __ Sw(reg, SP, ofs);
721 __ Swc1(reg, SP, ofs);
722 __ Swc1(static_cast<FRegister>(reg + 1), SP, ofs + 4);
725 __ Swc1(reg, SP, ofs);
726 __ Sw(TMP, SP, ofs + 4);
729 __ Sdc1(reg, SP, ofs);
742 __ Sw(kMethodRegisterArgument, SP, kCurrentMethodStackOffset);
757 // TODO: increment/decrement SP in one step instead of two or remove this comment.
768 __ Lwc1(reg, SP, ofs);
769 __ Lwc1(static_cast<FRegister>(reg + 1), SP, ofs + 4);
771 __ Lwc1(reg, SP, ofs);
772 __ Lw(TMP, SP, ofs + 4);
776 __ Ldc1(reg, SP, ofs);
786 __ Lw(reg, SP, ofs);
835 __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex());
844 __ LoadSFromOffset(destination.AsFpuRegister<FRegister>(), SP, source.GetStackIndex());
849 __ StoreToOffset(kStoreWord, source.AsRegister<Register>(), SP, destination.GetStackIndex());
851 __ StoreSToOffset(source.AsFpuRegister<FRegister>(), SP, destination.GetStackIndex());
854 __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex());
855 __ StoreToOffset(kStoreWord, TMP, SP, destination.GetStackIndex());
879 __ LoadFromOffset(kLoadDoubleword, r, SP, off);
892 __ LoadDFromOffset(destination.AsFpuRegister<FRegister>(), SP, source.GetStackIndex());
898 __ StoreToOffset(kStoreDoubleword, source.AsRegisterPairLow<Register>(), SP, off);
900 __ StoreDToOffset(source.AsFpuRegister<FRegister>(), SP, off);
903 __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex());
904 __ StoreToOffset(kStoreWord, TMP, SP, off);
905 __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex() + 4);
906 __ StoreToOffset(kStoreWord, TMP, SP, off + 4);
921 __ StoreConst32ToOffset(value, SP, destination.GetStackIndex(), TMP);
933 __ StoreConst64ToOffset(value, SP, destination.GetStackIndex(), TMP);
943 __ StoreConst32ToOffset(value, SP, destination.GetStackIndex(), TMP);
955 __ StoreConst64ToOffset(value, SP, destination.GetStackIndex(), TMP);
996 // ZERO, K0, K1, GP, SP, RA are always reserved and can't be allocated.
1001 blocked_core_registers_[SP] = true;
1037 __ StoreToOffset(kStoreWord, Register(reg_id), SP, stack_index);
1042 __ LoadFromOffset(kLoadWord, Register(reg_id), SP, stack_index);
1047 __ StoreDToOffset(FRegister(reg_id), SP, stack_index);
1052 __ LoadDFromOffset(FRegister(reg_id), SP, stack_index);
3744 __ LoadFromOffset(kLoadWord, temp, SP, receiver.GetStackIndex());
3868 __ Lw(reg, SP, kCurrentMethodStackOffset);
4270 __ Lw(current_method_register, SP, kCurrentMethodStackOffset);
