Lines Matching defs:out
199 Location out = locations->Out();
200 if (out.IsValid()) {
201 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg()));
203 mips64_codegen->MoveLocation(out, calling_convention.GetReturnLocation(type), type);
235 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg()));
250 mips64_codegen->MoveLocation(locations->Out(),
335 Location object_class = instruction_->IsCheckCast() ? locations->GetTemp(0) : locations->Out();
338 || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg()));
363 mips64_codegen->MoveLocation(locations->Out(), ret_loc, ret_type);
919 // TODO: remove once all the issues with register saving/restoring are sorted out.
1066 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
1124 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>();
1173 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
1295 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1299 __ LoadFromOffset(kLoadUnsignedByte, out, obj, offset);
1302 __ LoadFromOffset(kLoadUnsignedByte, out, TMP, data_offset);
1309 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1313 __ LoadFromOffset(kLoadSignedByte, out, obj, offset);
1316 __ LoadFromOffset(kLoadSignedByte, out, TMP, data_offset);
1323 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1327 __ LoadFromOffset(kLoadSignedHalfword, out, obj, offset);
1331 __ LoadFromOffset(kLoadSignedHalfword, out, TMP, data_offset);
1338 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1342 __ LoadFromOffset(kLoadUnsignedHalfword, out, obj, offset);
1346 __ LoadFromOffset(kLoadUnsignedHalfword, out, TMP, data_offset);
1355 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1360 __ LoadFromOffset(load_type, out, obj, offset);
1364 __ LoadFromOffset(load_type, out, TMP, data_offset);
1371 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1375 __ LoadFromOffset(kLoadDoubleword, out, obj, offset);
1379 __ LoadFromOffset(kLoadDoubleword, out, TMP, data_offset);
1386 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
1390 __ LoadFpuFromOffset(kLoadWord, out, obj, offset);
1394 __ LoadFpuFromOffset(kLoadWord, out, TMP, data_offset);
1401 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
1405 __ LoadFpuFromOffset(kLoadDoubleword, out, obj, offset);
1409 __ LoadFpuFromOffset(kLoadDoubleword, out, TMP, data_offset);
1431 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1432 __ LoadFromOffset(kLoadWord, out, obj, offset);
1694 GpuRegister res = locations->Out().AsRegister<GpuRegister>();
1810 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
1854 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1860 __ Move(out, ZERO);
1864 __ Subu(out, ZERO, dividend);
1867 __ Dsubu(out, ZERO, dividend);
1869 } else if (out != dividend) {
1870 __ Move(out, dividend);
1883 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1898 __ Addu(out, dividend, TMP);
1899 __ Sra(out, out, ctz_imm);
1901 __ Subu(out, ZERO, out);
1916 __ Daddu(out, dividend, TMP);
1918 __ Dsra(out, out, ctz_imm);
1920 __ Dsra32(out, out, ctz_imm - 32);
1923 __ Dsubu(out, ZERO, out);
1931 __ Subu(out, dividend, TMP);
1932 __ Andi(out, out, 1);
1933 __ Addu(out, out, TMP);
1937 __ Addu(out, dividend, TMP);
1939 __ Andi(out, out, abs_imm - 1);
1941 __ Sll(out, out, 32 - ctz_imm);
1942 __ Srl(out, out, 32 - ctz_imm);
1944 __ Subu(out, out, TMP);
1951 __ Dsubu(out, dividend, TMP);
1952 __ Andi(out, out, 1);
1953 __ Daddu(out, out, TMP);
1961 __ Daddu(out, dividend, TMP);
1963 __ Andi(out, out, abs_imm - 1);
1966 __ Dsll(out, out, 64 - ctz_imm);
1967 __ Dsrl(out, out, 64 - ctz_imm);
1969 __ Dsll32(out, out, 32 - ctz_imm);
1970 __ Dsrl32(out, out, 32 - ctz_imm);
1973 __ Dsubu(out, out, TMP);
1986 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
2015 __ Sra(out, TMP, 31);
2016 __ Subu(out, TMP, out);
2022 __ Subu(out, dividend, TMP);
2041 __ Dsra32(out, TMP, 31);
2042 __ Dsubu(out, TMP, out);
2048 __ Dsubu(out, dividend, TMP);
2059 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
2079 __ DivR6(out, dividend, divisor);
2081 __ Ddiv(out, dividend, divisor);
2084 __ ModR6(out, dividend, divisor);
2086 __ Dmod(out, dividend, divisor);
2125 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>();
2244 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
2696 codegen_->MoveLocation(locations->Out(), locations->InAt(1), select->GetType());
2759 DCHECK(locations->Out().IsRegister());
2760 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
2763 DCHECK(locations->Out().IsFpuRegister());
2764 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>();
2863 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
2869 __ Move(out, ZERO);
2873 __ LoadFromOffset(kLoadUnsignedWord, out, obj, mirror::Object::ClassOffset().Int32Value());
2876 __ Xor(out, out, cls);
2877 __ Sltiu(out, out, 1);
2884 __ Bnec(out, cls, slow_path->GetEntryLabel());
2885 __ LoadConst32(out, 1);
2992 // sorted out.
3069 // Currently filtered out by GetSupportedInvokeStaticOrDirectDispatch().
3116 // Currently filtered out by GetSupportedInvokeStaticOrDirectDispatch().
3207 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
3212 __ LoadFromOffset(kLoadUnsignedWord, out, current_method,
3215 __ LoadFromOffset(kLoadDoubleword, out, current_method,
3218 kLoadUnsignedWord, out, out, CodeGenerator::GetCacheOffset(cls->GetTypeIndex()));
3229 __ Beqzc(out, slow_path->GetEntryLabel());
3232 GenerateClassInitializationCheck(slow_path, out);
3251 GpuRegister out = load->GetLocations()->Out().AsRegister<GpuRegister>();
3252 __ LoadFromOffset(kLoadUnsignedWord, out, TR, GetExceptionTlsOffset());
3274 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
3276 __ LoadFromOffset(kLoadUnsignedWord, out, current_method,
3278 __ LoadFromOffset(kLoadDoubleword, out, out, mirror::Class::DexCacheStringsOffset().Int32Value());
3280 kLoadUnsignedWord, out, out, CodeGenerator::GetCacheOffset(load->GetStringIndex()));
3286 __ Beqzc(out, slow_path->GetEntryLabel());
3351 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
3362 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>();
3404 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
3414 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>();
3494 GpuRegister dst = locations->Out
3513 __ Xori(locations->Out().AsRegister<GpuRegister>(),
3869 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
3910 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>();
3929 GpuRegister dst = locations->Out().AsRegister<GpuRegister>();
4013 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>();
