Lines Matching defs:in
5 * you may not use this file except in compliance with the License.
10 * Unless required by applicable law or agreed to in writing, software
61 // Live registers will be restored in the catch block if caught.
87 // Live registers will be restored in the catch block if caught.
139 // Live registers will be restored in the catch block if caught.
447 << "Unexpected instruction in read barrier marking slow path: "
497 // In that case, we have lost the information about the original
512 << "Unexpected instruction in read barrier for heap reference slow path: "
525 // Compute the actual memory offset and store it in `index`.
556 // The initial register stored in `index_` has already been
557 // saved in the call to art::SlowPathCode::SaveLiveRegisters
561 // Shifting the index value contained in `index_reg` by the scale
562 // factor (2) cannot overflow in practice, as the runtime is
664 << "Unexpected instruction in read barrier for GC root slow path: "
1433 // LHS is guaranteed to be in a register (see LocationsBuilderX86::HandleCondition).
1496 // In 32 bit mode, a long condition doesn't generate a single CC either.
1621 // MaybeRecordNativeDebugInfo is already called implicitly in CodeGenerator::Compile.
1631 // Handle the long/FP comparisons made in instruction simplification.
2033 // However this is not required in practice, as this is an
2037 // concurrent copying collector may not in the future).
2085 Location in = locations->InAt(0);
2088 DCHECK(in.IsRegister());
2089 DCHECK(in.Equals(out));
2094 DCHECK(in.IsRegisterPair());
2095 DCHECK(in.Equals(out));
2107 DCHECK(in.Equals(out));
2120 DCHECK(in.Equals(out));
2280 // The runtime helper puts the result in EAX, EDX.
2382 Location in = locations->InAt(0);
2391 if (in.IsRegisterPair()) {
2392 __ movsxb(out.AsRegister<Register>(), in.AsRegisterPairLow<ByteRegister>());
2394 DCHECK(in.GetConstant()->IsLongConstant());
2395 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2405 if (in.IsRegister()) {
2406 __ movsxb(out.AsRegister<Register>(), in.AsRegister<ByteRegister>());
2408 DCHECK(in.GetConstant()->IsIntConstant());
2409 int32_t value = in.GetConstant()->AsIntConstant()->GetValue();
2424 if (in.IsRegisterPair()) {
2425 __ movsxw(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2426 } else if (in.IsDoubleStackSlot()) {
2427 __ movsxw(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2429 DCHECK(in.GetConstant()->IsLongConstant());
2430 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2440 if (in.IsRegister()) {
2441 __ movsxw(out.AsRegister<Register>(), in.AsRegister<Register>());
2442 } else if (in.IsStackSlot()) {
2443 __ movsxw(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2445 DCHECK(in.GetConstant()->IsIntConstant());
2446 int32_t value = in.GetConstant()->AsIntConstant()->GetValue();
2461 if (in.IsRegisterPair()) {
2462 __ movl(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2463 } else if (in.IsDoubleStackSlot()) {
2464 __ movl(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2466 DCHECK(in.IsConstant());
2467 DCHECK(in.GetConstant()->IsLongConstant());
2468 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2475 XmmRegister input = in.AsFpuRegister<XmmRegister>();
2500 XmmRegister input = in.AsFpuRegister<XmmRegister>();
2540 DCHECK_EQ(in.AsRegister<Register>(), EAX);
2572 if (in.IsRegisterPair()) {
2573 __ movzxw(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2574 } else if (in.IsDoubleStackSlot()) {
2575 __ movzxw(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2577 DCHECK(in.GetConstant()->IsLongConstant());
2578 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2588 if (in.IsRegister()) {
2589 __ movzxw(out.AsRegister<Register>(), in.AsRegister<Register>());
2590 } else if (in.IsStackSlot()) {
2591 __ movzxw(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2593 DCHECK(in.GetConstant()->IsIntConstant());
2594 int32_t value = in.GetConstant()->AsIntConstant()->GetValue();
2614 __ cvtsi2ss(out.AsFpuRegister<XmmRegister>(), in.AsRegister<Register>());
2624 if (!in.IsDoubleStackSlot() || !out.IsStackSlot()) {
2630 PushOntoFPStack(in, 0, adjustment, false, true);
2649 __ cvtsd2ss(out.AsFpuRegister<XmmRegister>(), in.AsFpuRegister<XmmRegister>());
2667 __ cvtsi2sd(out.AsFpuRegister<XmmRegister>(), in.AsRegister<Register>());
2677 if (!in.IsDoubleStackSlot() || !out.IsDoubleStackSlot()) {
2683 PushOntoFPStack(in, 0, adjustment, false, true);
2702 __ cvtss2sd(out.AsFpuRegister<XmmRegister>(), in.AsFpuRegister<XmmRegister>());
2996 // The constant may have ended up in a register, so test explicitly to avoid
3188 // Load the values to the FP stack in reverse order, using temporaries if needed.
3449 // We need to save the numerator while we tweak eax and edx. As we are using imul in a way
3450 // which enforces results to be in EAX and EDX, things are simpler if we use EAX also as
3463 // Runtime helper puts the result in EAX, EDX.
3550 // We need to save the numerator while we tweak eax and edx. As we are using imul in a way
3551 // which enforces results to be in EAX and EDX, things are simpler if we use EDX also as
3564 // Runtime helper puts the result in EAX, EDX.
3686 // The shift count needs to be in CL or a constant.
3883 // The shift count needs to be in CL (unless it is a constant).
4097 Location in = locations->InAt(0);
4099 DCHECK(in.Equals(out));
4124 Location in = locations->InAt(0);
4126 DCHECK(in.Equals(out));
4264 * For those cases, all we need to ensure is that there is a scheduling barrier in place.
4339 Location callee_method = temp; // For all kinds except kRecursive, callee will be in temp.
4421 // intrinsics may have put the receiver in a different register. In the intrinsics
4432 // However this is not required in practice, as this is an
4436 // concurrent copying collector may not in the future).
4552 // The output overlaps in case of long: we don't want the low move
4553 // to overwrite the object's location. Likewise, in the case of
4572 // path in CodeGeneratorX86::GenerateFieldLoadWithBakerReadBarrier.
4618 // Note that a potential implicit null check is handled in this
4672 in the case of reference or
4673 // long fields, are handled in the previous switch statement.
4680 // Memory barriers, in the case of references, are also handled
4681 // in the previous switch statement.
4700 // inputs that die at entry with one in a specific register.
4702 // Ensure the value is in a byte register.
4706 // In order to satisfy the semantics of volatile, this must be a single instruction store.
4712 // In order to satisfy the semantics of volatile, this must be a single instruction store.
4728 // Ensure the card is in a byte register.
4775 // Note that in the case where `value` is a null reference,
5021 // The output overlaps in case of long: we don't want the low move
5022 // to overwrite the array's location. Likewise, in the case of an
5033 // path in CodeGeneratorX86::GenerateArrayLoadWithBakerReadBarrier.
5117 // Note that a potential implicit null check is handled in this
5193 // Potential implicit null checks, in the case of reference or
5194 // long arrays, are handled in the previous switch statement.
5217 // We need the inputs to be different than the output in case of long operation.
5218 // In case of a byte operation, the register allocator does not support multiple
5219 // inputs that die at entry with one in a specific register.
5223 // Ensure the value is in a byte register.
5233 // Ensure the card is in a byte register.
5337 // restored afterwards). So in this case, we bail out and
5353 // nor the object reference in `register_value->klass`, as
5839 // Take advantage of the 16 bytes in the XMM register.
5851 // Take advantage of the 16 bytes in the XMM register.
6357 LocationSummary::kNoCall; // In fact, call on a fatal (non-returning) slow path.
6437 // If the class reference currently in `temp` is not null, jump
6445 // going into the slow path, as it has been overwritten in the
6478 // If the class reference currently in `temp` is not null, jump
6485 // going into the slow path, as it has been overwritten in the
6518 // going into the slow path, as it has been overwritten in the
6731 // in the following move operation, as we will need it for the
6875 // In slow path based read barriers, the read barrier call is
6876 // inserted after the original load. However, in fast path based
6890 // Note: the original implementation in ReadBarrier::Barrier is
7119 // Is the value in range?
7124 // We are in the range of the table.
7128 // Compute the actual target address by adding in constant_area.
7235 // The value to patch is the distance from the offset in the constant area
7240 // Patch in the right value.
7244 // Location in constant area that the fixup refers to.
7249 * Class to handle late fixup of offsets to a jump table that will be created in the
7264 // The label values in the jump table are computed relative to the
7372 // TODO: Consider pairs in the parallel move resolver, then this could be nicely merged
