Lines Matching defs:out
111 Location out = invoke_->GetLocations()->Out();
112 if (out.IsValid()) {
113 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory.
114 DCHECK(!invoke_->GetLocations()->GetLiveRegisters()->ContainsCoreRegister(out.reg()));
115 MoveFromReturnRegister(out, invoke_->GetType(), codegen);
151 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
154 __ Dmfc1(out, in);
156 __ Mfc1(out, in);
188 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
191 __ Dmtc1(in, out);
193 __ Mtc1(in, out);
227 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
231 __ Dsbh(out, in);
232 __ Seh(out, out);
235 __ Rotr(out, in, 16);
236 __ Wsbh(out, out);
239 __ Dsbh(out, in);
240 __ Dshd(out, out);
279 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
282 __ Dclz(out, in);
284 __ Clz(out, in);
310 Location out = locations->Out();
313 __ Dsbh(out.AsRegister<GpuRegister>(), in.AsRegister<GpuRegister>());
314 __ Dshd(out.AsRegister<GpuRegister>(), out.AsRegister<GpuRegister>());
315 __ Dbitswap(out.AsRegister<GpuRegister>(), out.AsRegister<GpuRegister>());
316 __ Dclz(out.AsRegister<GpuRegister>(), out.AsRegister<GpuRegister>());
318 __ Rotr(out.AsRegister<GpuRegister>(), in.AsRegister<GpuRegister>(), 16);
319 __ Wsbh(out.AsRegister<GpuRegister>(), out.AsRegister<GpuRegister>());
320 __ Bitswap(out.AsRegister<GpuRegister>(), out.AsRegister<GpuRegister>());
321 __ Clz(out.AsRegister<GpuRegister>(), out.AsRegister<GpuRegister>());
349 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
352 __ Rotr(out, in, 16);
353 __ Wsbh(out, out);
354 __ Bitswap(out, out);
356 __ Dsbh(out, in);
357 __ Dshd(out, out);
358 __ Dbitswap(out, out);
390 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
393 __ AbsD(out, in);
395 __ AbsS(out, in);
427 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
431 __ Xor(out, in, AT);
432 __ Dsubu(out, out, AT);
435 __ Xor(out, in, AT);
436 __ Subu(out, out, AT);
464 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
468 FpuRegister ftmp = ((out != a) && (out != b)) ? out : FTMP;
486 if (ftmp != out) {
487 __ MovD(out, ftmp);
495 __ MinD(out, a, b);
497 __ MaxD(out, a, b);
509 if (ftmp != out) {
510 __ MovS(out, ftmp);
518 __ MinS(out, a, b);
520 __ MaxS(out, a, b);
577 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
580 if (out != lhs) {
581 __ Move(out, lhs);
607 if (out == lhs) {
610 __ Seleqz(out, lhs, AT);
613 __ Selnez(out, lhs, AT);
619 __ Seleqz(out, rhs, AT);
622 __ Selnez(out, rhs, AT);
626 __ Or(out, out, AT);
684 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
686 __ SqrtD(out, in);
708 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
710 __ RintD(out, in);
734 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
736 DCHECK_NE(in, out);
744 __ ClassD(out, in);
745 __ Dmfc1(AT, out);
747 __ MovD(out, in);
763 __ FloorLD(out, in);
765 __ CeilLD(out, in);
767 __ Dmfc1(AT, out);
768 __ MovD(out, in);
772 // double out = outLong;
773 // return out;
774 __ Dmtc1(AT, out);
775 __ Cvtdl(out, out);
801 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
803 __ Lb(out, adr, 0);
814 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
816 __ Lh(out, adr, 0);
827 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
829 __ Lw(out, adr, 0);
840 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
842 __ Ld(out, adr, 0);
915 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
918 out,
946 GpuRegister trg = locations->Out().AsRegister<GpuRegister>();
1073 bool value_can_be_null = true; // TODO: Worth finding out this information?
1214 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1216 DCHECK_NE(base, out);
1217 DCHECK_NE(offset, out);
1218 DCHECK_NE(expected, out);
1222 bool value_can_be_null = true; // TODO: Worth finding out this information?
1236 __ Lld(out, TMP);
1240 __ Ll(out, TMP);
1242 __ Dsubu(out, out, expected); // If we didn't get the 'expected'
1243 __ Sltiu(out, out, 1); // value, set 'out' to false, and
1244 __ Beqzc(out, &exit_loop); // return.
1245 __ Move(out, value); // Use 'out' for the 'store conditional' instruction.
1249 // correct boolean value into the 'out' register.
1251 __ Scd(out, TMP);
1253 __ Sc(out, TMP);
1255 __ Beqzc(out, &loop_head); // If we couldn't do the read-modify-write
1309 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1326 // out = obj[2*idx].
1329 __ Lhu(out, TMP, value_offset); // Load char at location idx
1388 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1412 __ LoadConst64(out, 1);
1449 __ Ld(out, TMP, value_offset);
1451 __ Bnec(out, temp2, &return_false);
1460 __ LoadConst64(out, 1);
1465 __ LoadConst64(out, 0);
1666 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
1673 __ Mfc1(out, FTMP);
1674 __ Andi(out, out, kPositiveInfinity | kNegativeInfinity);
1675 __ Sltu(out, ZERO, out);
