Lines Matching refs:sd
338 void Arm32Assembler::vmovs(SRegister sd, SRegister sm, Condition cond) {
339 EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm);
348 bool Arm32Assembler::vmovs(SRegister sd, float s_imm, Condition cond) {
356 sd, S0, S0);
378 void Arm32Assembler::vadds(SRegister sd, SRegister sn, SRegister sm,
380 EmitVFPsss(cond, B21 | B20, sd, sn, sm);
390 void Arm32Assembler::vsubs(SRegister sd, SRegister sn, SRegister sm,
392 EmitVFPsss(cond, B21 | B20 | B6, sd, sn, sm);
402 void Arm32Assembler::vmuls(SRegister sd, SRegister sn, SRegister sm,
404 EmitVFPsss(cond, B21, sd, sn, sm);
414 void Arm32Assembler::vmlas(SRegister sd, SRegister sn, SRegister sm,
416 EmitVFPsss(cond, 0, sd, sn, sm);
426 void Arm32Assembler::vmlss(SRegister sd, SRegister sn, SRegister sm,
428 EmitVFPsss(cond, B6, sd, sn, sm);
438 void Arm32Assembler::vdivs(SRegister sd, SRegister sn, SRegister sm,
440 EmitVFPsss(cond, B23, sd, sn, sm);
450 void Arm32Assembler::vabss(SRegister sd, SRegister sm, Condition cond) {
451 EmitVFPsss(cond, B23 | B21 | B20 | B7 | B6, sd, S0, sm);
460 void Arm32Assembler::vnegs(SRegister sd, SRegister sm, Condition cond) {
461 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B6, sd, S0, sm);
470 void Arm32Assembler::vsqrts(SRegister sd, SRegister sm, Condition cond) {
471 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B7 | B6, sd, S0, sm);
479 void Arm32Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) {
480 EmitVFPsd(cond, B23 | B21 | B20 | B18 | B17 | B16 | B8 | B7 | B6, sd, dm);
489 void Arm32Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) {
490 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm);
494 void Arm32Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) {
495 EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B16 | B8 | B7 | B6, sd, dm);
499 void Arm32Assembler::vcvtsi(SRegister sd, SRegister sm, Condition cond) {
500 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B7 | B6, sd, S0, sm);
509 void Arm32Assembler::vcvtus(SRegister sd, SRegister sm, Condition cond) {
510 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B7 | B6, sd, S0, sm);
514 void Arm32Assembler::vcvtud(SRegister sd, DRegister dm, Condition cond) {
515 EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B8 | B7 | B6, sd, dm);
519 void Arm32Assembler::vcvtsu(SRegister sd, SRegister sm, Condition cond) {
520 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B6, sd, S0, sm);
529 void Arm32Assembler::vcmps(SRegister sd, SRegister sm, Condition cond) {
530 sd, S0, sm);
539 void Arm32Assembler::vcmpsz(SRegister sd, Condition cond) {
540 EmitVFPsss(cond, B23 | B21 | B20 | B18 | B16 | B6, sd, S0, S0);
1035 void Arm32Assembler::vldrs(SRegister sd, const Address& ad, Condition cond) {
1037 CHECK_NE(sd, kNoSRegister);
1041 ((static_cast<int32_t>(sd) & 1)*B22) |
1042 ((static_cast<int32_t>(sd) >> 1)*B12) |
1048 void Arm32Assembler::vstrs(SRegister sd, const Address& ad, Condition cond) {
1051 CHECK_NE(sd, kNoSRegister);
1055 ((static_cast<int32_t>(sd) & 1)*B22) |
1056 ((static_cast<int32_t>(sd) >> 1)*B12) |
1136 SRegister sd, SRegister sn, SRegister sm) {
1137 CHECK_NE(sd, kNoSRegister);
1143 ((static_cast<int32_t>(sd) & 1)*B22) |
1145 ((static_cast<int32_t>(sd) >> 1)*B12) |
1172 SRegister sd, DRegister dm) {
1173 CHECK_NE(sd, kNoSRegister);
1178 ((static_cast<int32_t>(sd) & 1)*B22) |
1179 ((static_cast<int32_t>(sd) >> 1)*B12) |
1385 void Arm32Assembler::LoadLiteral(SRegister sd ATTRIBUTE_UNUSED,
