Lines Matching refs:reg
70 reg nick purpose
78 x16 ip scratch reg
79 x17 ip2 scratch reg (used by macros)
189 .macro FETCH_ADVANCE_INST_RB reg
190 add xPC, xPC, \reg, sxtw
200 .macro FETCH reg, count
201 ldrh \reg, [xPC, #((\count)*2)]
204 .macro FETCH_S reg, count
205 ldrsh \reg, [xPC, #((\count)*2)]
213 .macro FETCH_B reg, count, byte
214 ldrb \reg, [xPC, #((\count)*2+(\byte))]
220 .macro GET_INST_OPCODE reg
221 and \reg, xINST, #255
232 * Begin executing the opcode in _reg. Clobbers reg
235 .macro GOTO_OPCODE reg
236 add \reg, xIBASE, \reg, lsl #${handler_size_bits}
237 br \reg
239 .macro GOTO_OPCODE_BASE base,reg
240 add \reg, \base, \reg, lsl #${handler_size_bits}
241 br \reg
247 .macro GET_VREG reg, vreg
248 ldr \reg, [xFP, \vreg, uxtw #2]
250 .macro SET_VREG reg, vreg
251 str \reg, [xFP, \vreg, uxtw #2]
254 .macro SET_VREG_OBJECT reg, vreg, tmpreg
255 str \reg, [xFP, \vreg, uxtw #2]
256 str \reg, [xREFS, \vreg, uxtw #2]
263 .macro GET_VREG_WIDE reg, vreg
265 ldr \reg, [ip2]
267 .macro SET_VREG_WIDE reg, vreg
269 str \reg, [ip2]
277 .macro VREG_INDEX_TO_ADDR reg, vreg
278 add \reg, xFP, \vreg, lsl #2 /* WARNING: handle shadow frame vreg zero if store */
