Lines Matching defs:UNIT
281 #define UNIT(unit) ((unit)*NSIZE)
282 #define UNITM1(unit) (((unit)*NSIZE)-1)
471 C_LD t0,UNIT(0)(a1)
476 C_LD t1,UNIT(1)(a1)
490 C_LD REG2,UNIT(2)(a1)
491 C_LD REG3,UNIT(3)(a1)
492 C_LD REG4,UNIT(4)(a1)
493 C_LD REG5,UNIT(5)(a1)
494 C_LD REG6,UNIT(6)(a1)
495 C_LD REG7,UNIT(7)(a1)
501 C_ST t0,UNIT(0)(a0)
502 C_ST t1,UNIT(1)(a0)
503 C_ST REG2,UNIT(2)(a0)
504 C_ST REG3,UNIT(3)(a0)
505 C_ST REG4,UNIT(4)(a0)
506 C_ST REG5,UNIT(5)(a0)
507 C_ST REG6,UNIT(6)(a0)
508 C_ST REG7,UNIT(7)(a0)
510 C_LD t0,UNIT(8)(a1)
511 C_LD t1,UNIT(9)(a1)
512 C_LD REG2,UNIT(10)(a1)
513 C_LD REG3,UNIT(11)(a1)
514 C_LD REG4,UNIT(12)(a1)
515 C_LD REG5,UNIT(13)(a1)
516 C_LD REG6,UNIT(14)(a1)
517 C_LD REG7,UNIT(15)(a1)
521 C_ST t0,UNIT(8)(a0)
522 C_ST t1,UNIT(9)(a0)
523 C_ST REG2,UNIT(10)(a0)
524 C_ST REG3,UNIT(11)(a0)
525 C_ST REG4,UNIT(12)(a0)
526 C_ST REG5,UNIT(13)(a0)
527 C_ST REG6,UNIT(14)(a0)
528 C_ST REG7,UNIT(15)(a0)
529 PTR_ADDIU a0,a0,UNIT(16) /* adding 64/128 to dest */
531 PTR_ADDIU a1,a1,UNIT(16) /* adding 64/128 to src */
546 C_LD t0,UNIT(0)(a1)
547 C_LD t1,UNIT(1)(a1)
548 C_LD REG2,UNIT(2)(a1)
549 C_LD REG3,UNIT(3)(a1)
550 C_LD REG4,UNIT(4)(a1)
551 C_LD REG5,UNIT(5)(a1)
552 C_LD REG6,UNIT(6)(a1)
553 C_LD REG7,UNIT(7)(a1)
554 PTR_ADDIU a1,a1,UNIT(8)
555 C_ST t0,UNIT(0)(a0)
556 C_ST t1,UNIT(1)(a0)
557 C_ST REG2,UNIT(2)(a0)
558 C_ST REG3,UNIT(3)(a0)
559 C_ST REG4,UNIT(4)(a0)
560 C_ST REG5,UNIT(5)(a0)
561 C_ST REG6,UNIT(6)(a0)
562 C_ST REG7,UNIT(7)(a0)
563 PTR_ADDIU a0,a0,UNIT(8)
580 C_LD REG3,UNIT(0)(a1)
581 PTR_ADDIU a0,a0,UNIT(1)
582 PTR_ADDIU a1,a1,UNIT(1)
584 C_ST REG3,UNIT(-1)(a0)
615 C_LDHI v1,UNIT(0)(a1)
618 C_STHI v1,UNIT(0)(a0)
660 C_LDHI t0,UNIT(0)(a1)
661 C_LDHI t1,UNIT(1)(a1)
662 C_LDHI REG2,UNIT(2)(a1)
667 C_LDHI REG3,UNIT(3)(a1)
671 C_LDHI REG4,UNIT(4)(a1)
672 C_LDHI REG5,UNIT(5)(a1)
673 C_LDHI REG6,UNIT(6)(a1)
674 C_LDHI REG7,UNIT(7)(a1)
684 C_ST t0,UNIT(0)(a0)
685 C_ST t1,UNIT(1)(a0)
686 C_ST REG2,UNIT(2)(a0)
687 C_ST REG3,UNIT(3)(a0)
688 C_ST REG4,UNIT(4)(a0)
689 C_ST REG5,UNIT(5)(a0)
690 C_ST REG6,UNIT(6)(a0)
691 C_ST REG7,UNIT(7)(a0)
692 C_LDHI t0,UNIT(8)(a1)
693 C_LDHI t1,UNIT(9)(a1)
694 C_LDHI REG2,UNIT(10)(a1)
695 C_LDHI REG3,UNIT(11)(a1)
696 C_LDHI REG4,UNIT(12)(a1)
697 C_LDHI REG5,UNIT(13)(a1)
698 C_LDHI REG6,UNIT(14)(a1)
699 C_LDHI REG7,UNIT(15)(a1)
709 C_ST t0,UNIT(8)(a0)
710 C_ST t1,UNIT(9)(a0)
711 C_ST REG2,UNIT(10)(a0)
712 C_ST REG3,UNIT(11)(a0)
713 C_ST REG4,UNIT(12)(a0)
714 C_ST REG5,UNIT(13)(a0)
715 C_ST REG6,UNIT(14)(a0)
716 C_ST REG7,UNIT(15)(a0)
717 PTR_ADDIU a0,a0,UNIT(16) /* adding 64/128 to dest */
719 PTR_ADDIU a1,a1,UNIT(16) /* adding 64/128 to src */
733 C_LDHI t0,UNIT(0)(a1)
734 C_LDHI t1,UNIT(1)(a1)
735 C_LDHI REG2,UNIT(2)(a1)
736 C_LDHI REG3,UNIT(3)(a1)
737 C_LDHI REG4,UNIT(4)(a1)
738 C_LDHI REG5,UNIT(5)(a1)
739 C_LDHI REG6,UNIT(6)(a1)
740 C_LDHI REG7,UNIT(7)(a1)
749 PTR_ADDIU a1,a1,UNIT(8)
750 C_ST t0,UNIT(0)(a0)
751 C_ST t1,UNIT(1)(a0)
752 C_ST REG2,UNIT(2)(a0)
753 C_ST REG3,UNIT(3)(a0)
754 C_ST REG4,UNIT(4)(a0)
755 C_ST REG5,UNIT(5)(a0)
756 C_ST REG6,UNIT(6)(a0)
757 C_ST REG7,UNIT(7)(a0)
758 PTR_ADDIU a0,a0,UNIT(8)
771 C_LDHI v1,UNIT(0)(a1)
773 PTR_ADDIU a0,a0,UNIT(1)
774 PTR_ADDIU a1,a1,UNIT(1)
776 C_ST v1,UNIT(-1)(a0)
811 C_LD t0, UNIT(0)(REG2); /* Load first part of source. */ \
813 C_LD t1, UNIT(1)(REG2); /* Load second part of source. */ \
815 PTR_ADDIU a0, a0, UNIT(1); /* Increment destination pointer. */ \
816 PTR_ADDIU REG2, REG2, UNIT(1); /* Increment aligned source pointer.*/ \
819 C_ST REG3, UNIT(-1)(a0); \
