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Lines Matching defs:i1_ref_idx

411           (ps_left_mb_pu->s_me_info[PRED_L0].i1_ref_idx == -1) &&
416 (ps_top_mb_pu->s_me_info[PRED_L0].i1_ref_idx == -1) &&
485 (ps_left_mb_pu->s_me_info[PRED_L0].i1_ref_idx == -1) &&
490 (ps_top_mb_pu->s_me_info[PRED_L0].i1_ref_idx == -1) &&
544 WORD8 i1_ref_idx;
547 i1_ref_idx = -1;
554 a = (ps_left_mb_pu->s_me_info[i4_ref_list].i1_ref_idx == i1_ref_idx) ? 0 : -1;
555 b = (ps_top_row_pu[0].s_me_info[i4_ref_list].i1_ref_idx == i1_ref_idx) ? 0 : -1;
556 c = (ps_top_row_pu[1].s_me_info[i4_ref_list].i1_ref_idx == i1_ref_idx) ? 0 : -1;
666 ps_left_mb_pu->s_me_info[i4_reflist].i1_ref_idx = 0;
673 ps_top_row_pu[0].s_me_info[i4_reflist].i1_ref_idx = 0;
686 ps_top_row_pu[1].s_me_info[i4_reflist].i1_ref_idx = 0;
691 ps_top_row_pu[1].s_me_info[i4_reflist].i1_ref_idx = ps_top_left_mb_pu->s_me_info[i4_reflist].i1_ref_idx;
698 ps_top_row_pu[1].s_me_info[i4_reflist].i1_ref_idx = 0;
765 ps_left_mb_pu->s_me_info[i4_ref_list].i1_ref_idx = 0;
771 s_top_row_pu[0].s_me_info[i4_ref_list].i1_ref_idx = 0;
783 s_top_row_pu[1].s_me_info[i4_ref_list].i1_ref_idx = 0;
786 s_top_row_pu[1].s_me_info[i4_ref_list].i1_ref_idx = 0;
791 s_top_row_pu[1].s_me_info[i4_ref_list].i1_ref_idx = ps_top_left_mb_pu->s_me_info[0].i1_ref_idx;
797 ps_top_row_pu[1].s_me_info[i4_ref_list].i1_ref_idx = 0;
1065 ps_proc->ps_pu->s_me_info[0].i1_ref_idx = -1;
1066 ps_proc->ps_pu->s_me_info[1].i1_ref_idx = 0;
1374 i4_mode_avail |= (i4_a && (ps_a_pu->b2_pred_mode != i4_cmpl_mode) && (ps_a_pu->s_me_info[i].i1_ref_idx != 0))<<i;
1375 i4_mode_avail |= (i4_b && (ps_b_pu->b2_pred_mode != i4_cmpl_mode) && (ps_b_pu->s_me_info[i].i1_ref_idx != 0))<<i;
1376 i4_mode_avail |= (i4_c && (ps_c_pu->b2_pred_mode != i4_cmpl_mode) && (ps_c_pu->s_me_info[i].i1_ref_idx != 0))<<i;
1578 i4_mode_avail |= (i4_a && (ps_a_pu->b2_pred_mode != i4_cmpl_mode) && (ps_a_pu->s_me_info[i].i1_ref_idx != 0))<<i;
1579 i4_mode_avail |= (i4_b && (ps_b_pu->b2_pred_mode != i4_cmpl_mode) && (ps_b_pu->s_me_info[i].i1_ref_idx != 0))<<i;
1580 i4_mode_avail |= (i4_c && (ps_c_pu->b2_pred_mode != i4_cmpl_mode) && (ps_c_pu->s_me_info[i].i1_ref_idx != 0))<<i;
2106 ps_proc->ps_pu->s_me_info[0].i1_ref_idx = (ps_proc->ps_pu->b2_pred_mode != PRED_L1)? -1:0;
2107 ps_proc->ps_pu->s_me_info[1].i1_ref_idx = (ps_proc->ps_pu->b2_pred_mode != PRED_L0)? -1:0;