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25 macro \Const{UNW\_TARGET\_IA64} as 1 and the macro \Const{UNW\_TARGET}
51 call will fail with a return-value of \texttt{-}\Const{UNW\_EBADREG}.
85 \item[\Const{UNW\_IA64\_IP}:] Contains the instruction pointer (IP, or
89 instruction pointed to by \Const{UNW\_IA64\_IP}. Bits 0 and 1 of
94 \item[\Const{UNW\_IA64\_SP}:] Contains the (memory) stack-pointer
96 \item[\Const{UNW\_IA64\_BSP}:] Contains the register backing-store
99 instruction at \Const{UNW\_IA64\_IP} was about to begin execution.
107 \item[\Const{UNW\_IA64\_GR}:] The base-index for general (integer)
110 the index \Const{UNW\_IA64\_GR}\texttt{+4} should be used.
113 (\texttt{-}\Const{UNW\_EREADONLYREG}). Even though \texttt{r1} is
115 the instruction-pointer (\Const{UNW\_IA64\_IP}) is modified. For
116 example, if \Const{UNW\_IA64\_IP} is set to a value inside a
118 \Const{UNW\_IA64\_GR}\texttt{+1} will return the global-pointer
120 \item[\Const{UNW\_IA64\_NAT}:] The base-index for the NaT bits of the
124 NaT bit of \texttt{r4}, the index \Const{UNW\_IA64\_NAT}\texttt{+4}
126 \item[\Const{UNW\_IA64\_FR}:] The base-index for floating-point
129 \texttt{f2}, the index \Const{UNW\_IA64\_FR}\texttt{+2} should be
131 attempt to write to indices \Const{UNW\_IA64\_FR}\texttt{+0} or
132 \Const{UNW\_IA64\_FR}\texttt{+1} will result in an error
133 (\texttt{-}\Const{UNW\_EREADONLYREG}).
134 \item[\Const{UNW\_IA64\_AR}:] The base-index for application
137 \texttt{ar40}, the index \Const{UNW\_IA64\_AR}\texttt{+40} should be
140 results in an error (\texttt{-}\Const{UNW\_EBADREG}).
141 \item[\Const{UNW\_IA64\_BR}:] The base-index for branch registers.
144 \Const{UNW\_IA64\_BR}\texttt{+6} should be used.
145 \item[\Const{UNW\_IA64\_PR}:] Contains the set of predicate registers.
152 \item[\Const{UNW\_IA64\_CFM}:] Contains the current-frame-mask
162 \item[\Const{UNW\_IA64\_GP}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+1},
164 \item[\Const{UNW\_IA64\_TP}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+13},
166 \item[\Const{UNW\_IA64\_AR\_RSC}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+16},
168 \item[\Const{UNW\_IA64\_AR\_BSP}:] Alias for
169 \Const{UNW\_IA64\_GR}\texttt{+17}. This register index accesses the
172 use \Const{UNW\_IA64\_BSP} instead.
173 \item[\Const{UNW\_IA64\_AR\_BSPSTORE}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+18},
175 \item[\Const{UNW\_IA64\_AR\_RNAT}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+19},
177 \item[\Const{UNW\_IA64\_AR\_CCV}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+32},
179 \item[\Const{UNW\_IA64\_AR\_CSD}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+25},
181 \item[\Const{UNW\_IA64\_AR\_UNAT}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+36},
183 \item[\Const{UNW\_IA64\_AR\_FPSR}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+40},
185 \item[\Const{UNW\_IA64\_AR\_PFS}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+64},
187 \item[\Const{UNW\_IA64\_AR\_LC}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+65}
189 \item[\Const{UNW\_IA64\_AR\_EC}:] Alias for \Const{UNW\_IA64\_GR}\texttt{+66},