Lines Matching refs:NVT
105 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl,
217 SelectionDAGLegalize::ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl,
221 unsigned NumDestElts = NVT.getVectorNumElements();
227 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]);
240 assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?");
241 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]);
768 MVT NVT = TLI.getTypeToPromoteTo(ISD::STORE, VT);
769 assert(NVT.getSizeInBits() == VT.getSizeInBits() &&
771 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value);
793 EVT NVT = EVT::getIntegerVT(*DAG.getContext(),
798 NVT, isVolatile, isNonTemporal, Alignment, AAInfo);
933 MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
934 assert(NVT.getSizeInBits() == VT.getSizeInBits() &&
937 SDValue Res = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getMemOperand());
978 EVT NVT = EVT::getIntegerVT(*DAG.getContext(), NewWidth);
982 // way. A zext load from NVT thus automatically gives zext from SrcVT.
990 NVT, isVolatile, isNonTemporal, isInvariant, Alignment,
1000 else if (ExtType == ISD::ZEXTLOAD || NVT == Result.getValueType())
3158 EVT NVT = Node->getValueType(0);
3161 APInt x = APInt::getSignBit(NVT.getSizeInBits());
3167 True = DAG.getNode(ISD::FP_TO_SINT, dl, NVT, Node->getOperand(0));
3169 False = DAG.getNode(ISD::FP_TO_SINT, dl, NVT,
3172 False = DAG.getNode(ISD::XOR, dl, NVT, False,
3173 DAG.getConstant(x, dl, NVT));
3174 Tmp1 = DAG.getSelect(dl, NVT, Tmp2, True, False);
4225 MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), OVT);
4235 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
4238 Tmp1 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
4241 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(NVT),
4242 Tmp1, DAG.getConstant(NVT.getSizeInBits(), dl, NVT),
4244 Tmp1 = DAG.getSelect(dl, NVT, Tmp2,
4245 DAG.getConstant(OVT.getSizeInBits(), dl, NVT), Tmp1);
4248 // Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT))
4249 Tmp1 = DAG.getNode(ISD::SUB, dl, NVT, Tmp1,
4250 DAG.getConstant(NVT.getSizeInBits() -
4251 OVT.getSizeInBits(), dl, NVT));
4256 unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits();
4257 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
4258 Tmp1 = DAG.getNode(ISD::BSWAP, dl, NVT, Tmp1);
4260 ISD::SRL, dl, NVT, Tmp1,
4262 TLI.getShiftAmountTy(NVT, DAG.getDataLayout())));
4292 Tmp1 = DAG.getVAArg(NVT, dl, Chain, Ptr, Node->getOperand(2),
4322 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
4323 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
4325 Tmp1 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
4332 NVT.getSizeInBits()) {
4344 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
4345 Tmp3 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(2));
4347 Tmp1 = DAG.getSelect(dl, NVT, Tmp1, Tmp2, Tmp3);
4360 Tmp1 = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(0));
4361 Tmp2 = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(1));
4364 Tmp1 = ShuffleWithNarrowerEltType(NVT, OVT, dl, Tmp1, Tmp2, Mask);
4371 if (NVT.isInteger()) {
4376 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
4377 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
4384 if (NVT.isInteger()) {
4389 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(2));
4390 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(3));
4404 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4405 Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1));
4406 Tmp3 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2,
4413 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4414 Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1));
4415 Tmp3 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(2));
4418 DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2, Tmp3),
4424 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4426 Tmp3 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
4454 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4455 Tmp2 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
4462 MVT NewEltVT = NVT.getVectorElementType();
4470 assert(NVT.isVector() && OVT.getSizeInBits() == NVT.getSizeInBits() &&
4483 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SL, NVT, NewOps);
4490 MVT NewEltVT = NVT.getVectorElementType();
4503 assert(NVT.isVector() && OVT.getSizeInBits() == NVT.getSizeInBits() &&
4516 SDValue CastVec = DAG.getNode(ISD::BITCAST, SL, NVT, Node->getOperand(0));
4535 MVT NewEltVT = NVT.getVectorElementType();
4550 assert(NVT.isVector() && OVT.getSizeInBits() == NVT.getSizeInBits() &&
4565 SDValue CastVec = DAG.getNode(ISD::BITCAST, SL, NVT, Node->getOperand(0));
4576 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, NVT,
4585 MVT NewEltVT = NVT.getVectorElementType();
4606 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SL, NVT, NewElts);
