Lines Matching refs:And
69 // IR module verification is enabled by default in debug builds, and disabled
117 // We allocated with operator new and with some extra memory hanging off the
377 // an old-style (llvmgcc3) static ctor with __main linked in and in use. If
406 // to not even allow this and just assert here.
481 // IR module verification is enabled by default in debug builds, and disabled
521 // create, we assume they only want the JIT, and we fail if they only want
559 // If we can't make a JIT and we didn't request one specifically, try making
791 case Instruction::And:
809 case Instruction::And: GV.IntVal = LHS.IntVal & RHS.IntVal; break;
1091 // Host and target are different endian - reverse the stored bytes.
1096 /// from Src into IntVal, which is assumed to be wide enough and to hold zero.
1254 continue;// Ignore external globals and globals with internal linkage.
1323 // and initialize their contents.
