Lines Matching refs:addReg
112 .addReg(AArch64::XZR)
121 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
122 .addReg(DstReg)
179 .addReg(AArch64::XZR)
198 .addReg(DstReg,
200 .addReg(DstReg)
223 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
224 .addReg(DstReg)
362 .addReg(AArch64::XZR)
372 .addReg(DstReg,
374 .addReg(DstReg)
389 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
390 .addReg(DstReg)
417 .addReg(BitSize == 32 ? AArch64::WZR : AArch64::XZR)
538 .addReg(DstReg, RegState::Define |
562 .addReg(DstReg,
565 .addReg(DstReg)
659 .addReg(DstReg);
699 .addReg(DstReg)
715 .addReg(AArch64::LR);
