Lines Matching defs:Is64bit
363 bool Is64Bit = (VT == MVT::f64);
368 Is64Bit ? AArch64_AM::getFP64Imm(Val) : AArch64_AM::getFP32Imm(Val);
370 unsigned Opc = Is64Bit ? AArch64::FMOVDi : AArch64::FMOVSi;
376 unsigned Opc1 = Is64Bit ? AArch64::MOVi64imm : AArch64::MOVi32imm;
377 const TargetRegisterClass *RC = Is64Bit ?
403 unsigned Opc = Is64Bit ? AArch64::LDRDui : AArch64::LDRSui;
489 bool Is64Bit = (VT == MVT::f64);
490 unsigned ZReg = Is64Bit ? AArch64::XZR : AArch64::WZR;
491 unsigned Opc = Is64Bit ? AArch64::FMOVXDr : AArch64::FMOVWSr;
1258 bool Is64Bit = RetVT == MVT::i64;
1259 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit];
1261 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1266 ResultReg = Is64Bit ? AArch64::XZR : AArch64::WZR;
1300 bool Is64Bit = RetVT == MVT::i64;
1301 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit];
1304 RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1306 RC = Is64Bit ? &AArch64::GPR64spRegClass : &AArch64::GPR32spRegClass;
1311 ResultReg = Is64Bit ? AArch64::XZR : AArch64::WZR;
1343 bool Is64Bit = RetVT == MVT::i64;
1344 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit];
1346 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1351 ResultReg = Is64Bit ? AArch64::XZR : AArch64::WZR;
1383 bool Is64Bit = RetVT == MVT::i64;
1384 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit];
1387 RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1389 RC = Is64Bit ? &AArch64::GPR64spRegClass : &AArch64::GPR32spRegClass;
1394 ResultReg = Is64Bit ? AArch64::XZR : AArch64::WZR;
2235 bool Is64Bit = BW == 64;
2237 Is64Bit = false;
2239 unsigned Opc = OpcTable[IsBitTest][IsCmpNE][Is64Bit];
2247 if (BW == 64 && !Is64Bit)
3400 bool Is64Bit = RetVT == MVT::f64;
3405 LC = LibCallTable[0][Is64Bit];
3408 LC = LibCallTable[1][Is64Bit];
3411 LC = LibCallTable[2][Is64Bit];
3912 bool Is64Bit = (RetVT == MVT::i64);
3913 unsigned RegSize = Is64Bit ? 64 : 32;
3917 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
3967 unsigned Opc = OpcTable[IsZExt][Is64Bit];
4019 bool Is64Bit = (RetVT == MVT::i64);
4020 unsigned RegSize = Is64Bit ? 64 : 32;
4024 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4088 unsigned Opc = OpcTable[IsZExt][Is64Bit];
4140 bool Is64Bit = (RetVT == MVT::i64);
4141 unsigned RegSize = Is64Bit ? 64 : 32;
4145 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4197 unsigned Opc = OpcTable[IsZExt][Is64Bit];
4437 bool Is64bit = (DestVT == MVT::i64);
4442 DivOpc = Is64bit ? AArch64::SDIVXr : AArch64::SDIVWr;
4445 DivOpc = Is64bit ? AArch64::UDIVXr : AArch64::UDIVWr;
4448 unsigned MSubOpc = Is64bit ? AArch64::MSUBXrrr : AArch64::MSUBWrrr;
