Lines Matching refs:GPR64RegClass
344 const TargetRegisterClass *RC = (VT == MVT::i64) ? &AArch64::GPR64RegClass
378 &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
436 ResultReg = createResultReg(&AArch64::GPR64RegClass);
1261 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1304 RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1346 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1387 RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1688 RC = &AArch64::GPR64RegClass;
1790 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;
1795 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;
1800 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;
1804 RC = &AArch64::GPR64RegClass;
1832 unsigned Reg64 = createResultReg(&AArch64::GPR64RegClass);
2576 RC = &AArch64::GPR64RegClass;
2745 DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);
2874 RC = &AArch64::GPR64RegClass;
3118 CallReg = createResultReg(&AArch64::GPR64RegClass);
3312 unsigned SrcReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
3323 DestReg = fastEmitInst_ri(AArch64::LDRXui, &AArch64::GPR64RegClass,
3816 unsigned Reg64 = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
3850 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
3860 return fastEmitInst_rrr(AArch64::SMADDLrrr, &AArch64::GPR64RegClass,
3870 return fastEmitInst_rrr(AArch64::UMADDLrrr, &AArch64::GPR64RegClass,
3889 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
3917 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
3995 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4024 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4116 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4145 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4258 unsigned Src64 = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
4268 (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4355 unsigned Reg64 = createResultReg(&AArch64::GPR64RegClass);
4398 unsigned ResultReg = createResultReg(&AArch64::GPR64RegClass);
4460 (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4659 case MVT::i64: RC = &AArch64::GPR64RegClass; break;
4754 RC = &AArch64::GPR64RegClass;
