Cross Reference: /external/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines Matching full:adrp
838   case AArch64ISD::ADRP:              return "AArch64ISD::ADRP";
3325     SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi);
3328     SDValue PoolAddr = DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo);
3350     // Use ADRP/ADD or ADRP/LDR for everything else: the small model on ELF and
3357     SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi);
3358     return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo);
3380 ///     adrp x0, _var@TLVPPAGE
3434 /// have a descriptor, accessible via a PC-relative ADRP, and whose first entry
3438 ///    adrp  x0, :tlsdesc:var
4106   SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi);
4107   return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo);
4137     // Use ADRP/ADD or ADRP/LDR for everything else: the small memory model on
4146     SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi);
4147     return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo);
4169     SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi);
4170     return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo);
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