Lines Matching defs:OpNum
649 int OpNum = LdStDesc->ListOperand;
650 printVectorList(MI, OpNum++, STI, O, "");
653 O << '[' << MI->getOperand(OpNum++).getImm() << ']';
656 OpNum++).getReg();
661 unsigned Reg = MI->getOperand(OpNum++).getReg();
974 void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum,
977 const MCOperand &MO = MI->getOperand(OpNum);
982 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm());
985 printShifter(MI, OpNum + 1, STI, O);
992 printShifter(MI, OpNum + 1, STI, O);
996 void AArch64InstPrinter::printLogicalImm32(const MCInst *MI, unsigned OpNum,
999 uint64_t Val = MI->getOperand(OpNum).getImm();
1004 void AArch64InstPrinter::printLogicalImm64(const MCInst *MI, unsigned OpNum,
1007 uint64_t Val = MI->getOperand(OpNum).getImm();
1012 void AArch64InstPrinter::printShifter(const MCInst *MI, unsigned OpNum,
1015 unsigned Val = MI->getOperand(OpNum).getImm();
1024 void AArch64InstPrinter::printShiftedRegister(const MCInst *MI, unsigned OpNum,
1027 O << getRegisterName(MI->getOperand(OpNum).getReg());
1028 printShifter(MI, OpNum + 1, STI, O);
1031 void AArch64InstPrinter::printExtendedRegister(const MCInst *MI, unsigned OpNum,
1034 O << getRegisterName(MI->getOperand(OpNum).getReg());
1035 printArithExtend(MI, OpNum + 1, STI, O);
1038 void AArch64InstPrinter::printArithExtend(const MCInst *MI, unsigned OpNum,
1041 unsigned Val = MI->getOperand(OpNum).getImm();
1065 void AArch64InstPrinter::printMemExtend(const MCInst *MI, unsigned OpNum,
1068 unsigned SignExtend = MI->getOperand(OpNum).getImm();
1069 unsigned DoShift = MI->getOperand(OpNum + 1).getImm();
1082 void AArch64InstPrinter::printCondCode(const MCInst *MI, unsigned OpNum,
1085 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm();
1089 void AArch64InstPrinter::printInverseCondCode(const MCInst *MI, unsigned OpNum,
1092 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm();
1096 void AArch64InstPrinter::printAMNoIndex(const MCInst *MI, unsigned OpNum,
1099 O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()) << ']';
1103 void AArch64InstPrinter::printImmScale(const MCInst *MI, unsigned OpNum,
1106 O << '#' << Scale * MI->getOperand(OpNum).getImm();
1109 void AArch64InstPrinter::printUImm12Offset(const MCInst *MI, unsigned OpNum,
1111 const MCOperand MO = MI->getOperand(OpNum);
1120 void AArch64InstPrinter::printAMIndexedWB(const MCInst *MI, unsigned OpNum,
1122 const MCOperand MO1 = MI->getOperand(OpNum + 1);
1123 O << '[' << getRegisterName(MI->getOperand(OpNum).getReg());
1134 void AArch64InstPrinter::printPrefetchOp(const MCInst *MI, unsigned OpNum,
1137 unsigned prfop = MI->getOperand(OpNum).getImm();
1147 void AArch64InstPrinter::printPSBHintOp(const MCInst *MI, unsigned OpNum,
1150 unsigned psbhintop = MI->getOperand(OpNum).getImm();
1160 void AArch64InstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum,
1163 const MCOperand &MO = MI->getOperand(OpNum);
1218 unsigned OpNum,
1223 unsigned Reg = MI->getOperand(OpNum).getReg();
1233 void AArch64InstPrinter::printVectorList(const MCInst *MI, unsigned OpNum,
1237 unsigned Reg = MI->getOperand(OpNum).getReg();
1279 unsigned OpNum,
1282 printVectorList(MI, OpNum, STI, O, "");
1286 void AArch64InstPrinter::printTypedVectorList(const MCInst *MI, unsigned OpNum,
1295 printVectorList(MI, OpNum, STI, O, Suffix);
1298 void AArch64InstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum,
1301 O << "[" << MI->getOperand(OpNum).getImm() << "]";
1304 void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, unsigned OpNum,
1307 const MCOperand &Op = MI->getOperand(OpNum);
1318 dyn_cast<MCConstantExpr>(MI->getOperand(OpNum).getExpr());
1325 MI->getOperand(OpNum).getExpr()->print(O, &MAI);
1329 void AArch64InstPrinter::printAdrpLabel(const MCInst *MI, unsigned OpNum,
1332 const MCOperand &Op = MI->getOperand(OpNum);
1342 MI->getOperand(OpNum).getExpr()->print(O, &MAI);
