Lines Matching full:gather
4376 // have to gather the result with pairwise addition (vpaddl) for i16, i32,
4397 // Gather the #bits with vpaddl (pairwise add.)
4428 /// leverage vcnt to get the 8-bit counts, gather and add the results.
5567 // Gather data to see if the operation can be modelled as a
5597 // First gather all vectors used as an immediate source for this BUILD_VECTOR
9640 // Then, gather the new node's operands.
