Lines Matching refs:V2
4431 /// input = [v0 v1 v2 v3 ] (vi 16-bit element)
4457 /// input = [v0 v1 v2 v3 ] (vi 16-bit element)
5077 // e.g. For v1,v2 of type v4i32 a valid shuffle mask is: [0, 4, 2, 6]
5078 // v1={a,b,c,d} => x=shufflevector v1, v2 shufflemask => x={a,e,c,g}
5079 // v2={e,f,g,h}
5084 // result1 = shufflevector v1, v2, result1_shuffle_mask
5085 // result2 = shufflevector v1, v2, result2_shuffle_mask
5086 // where v1/v2 and the shuffle masks have the same number of elements
5090 // results = shufflevector v1, v2, shuffle_mask
5092 // as many elements as v1/v2 (here WhichResult will always be 0 if true) here we
5160 // e.g. For v1,v2 of type v4i32 a valid shuffle mask is: [0, 2, 4, 6]
5161 // v1={a,b,c,d} => x=shufflevector v1, v2 shufflemask => x={a,c,e,g}
5162 // v2={e,f,g,h}
5231 // e.g. For v1,v2 of type v4i32 a valid shuffle mask is: [0, 4, 1, 5]
5232 // v1={a,b,c,d} => x=shufflevector v1, v2 shufflemask => x={a,e,b,f}
5233 // v2={e,f,g,h}
5895 SDValue V2 = Op.getOperand(1);
5903 if (V2.getNode()->getOpcode() == ISD::UNDEF)
5907 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2,
5930 SDValue V2 = Op.getOperand(1);
5976 std::swap(V1, V2);
5977 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2,
5988 if (V2->getOpcode() == ISD::UNDEF &&
6004 V2 = V1;
6005 return DAG.getNode(ShuffleOpc, dl, DAG.getVTList(VT, VT), V1, V2)
6011 // shuffle(concat(v1, undef), concat(v2, undef))
6013 // shuffle(concat(v1, v2), undef)
6020 // shuffle(concat(v1, v2), undef)
6022 // concat(VZIP(v1, v2):0, :1)
6025 V2->getOpcode() == ISD::UNDEF) {
6068 return GeneratePerfectShuffle(PFEntry, V1, V2, DAG, dl);
6078 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2);
6085 ShuffleMask[i] < (int)NumElts ? V1 : V2,
8066 // V2 = MOVS V0
8068 // RSBBB: V3 = RSBri V2, 0 (compute ABS if V2 < 0)
8069 // SinkBB: V1 = PHI(V2, V3)
9439 // shuffle(concat(v1, undef), concat(v2, undef)) ->
9440 // shuffle(concat(v1, v2), undef)
12168 /// %sub.v2 = shuffle <8 x i32> %v0, <8 x i32> v1, <8, 9, 10, 11>
12169 /// call void llvm.arm.neon.vst3(%ptr, %sub.v0, %sub.v1, %sub.v2, 4)
