Lines Matching refs:MemOps
145 void FormCandidates(const MemOpQueue &MemOps);
795 /// Call MergeOps and update MemOps and merges accordingly on success.
920 void ARMLoadStoreOpt::FormCandidates(const MemOpQueue &MemOps) {
921 const MachineInstr *FirstMI = MemOps[0].MI;
927 unsigned EIndex = MemOps.size();
930 const MachineInstr *MI = MemOps[SIndex].MI;
931 int Offset = MemOps[SIndex].Offset;
959 int NewOffset = MemOps[I].Offset;
962 const MachineOperand &MO = getLoadStoreRegOp(*MemOps[I].MI);
989 unsigned Position = MemOps[I].Position;
990 if (Position < MemOps[Latest].Position)
992 else if (Position > MemOps[Earliest].Position)
1002 Candidate->Instrs.push_back(MemOps[C].MI);
1005 Candidate->InsertPos = MemOps[Latest].Position;
1635 MemOpQueue MemOps;
1665 MemOps.push_back(MemOpQueueEntry(MBBI, Offset, Position));
1681 for (const MemOpQueueEntry &E : MemOps) {
1692 if (Offset > MemOps.back().Offset) {
1693 MemOps.push_back(MemOpQueueEntry(MBBI, Offset, Position));
1697 for (MI = MemOps.begin(), ME = MemOps.end(); MI != ME; ++MI) {
1708 if (MI != MemOps.end()) {
1709 MemOps.insert(MI, MemOpQueueEntry(MBBI, Offset, Position));
1731 if (MemOps.size() > 0) {
1732 FormCandidates(MemOps);
1737 MemOps.clear();
1740 if (MemOps.size() > 0)
1741 FormCandidates(MemOps);
1946 SmallPtrSetImpl<MachineInstr*> &MemOps,
1954 if (I->isDebugValue() || MemOps.count(&*I))
2142 SmallPtrSet<MachineInstr*, 4> MemOps;
2145 MemOps.insert(Ops[i]);
2154 MemOps, MemRegs, TRI);
2162 && (MemOps.count(InsertPos) || InsertPos->isDebugValue()))
