Home | History | Annotate | Download | only in Disassembler

Lines Matching refs:Insn

186 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
188 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
191 unsigned Insn,
194 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
196 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn,
198 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
200 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
204 unsigned Insn,
207 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
209 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
211 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
213 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
215 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
217 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
219 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
227 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
229 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst,unsigned Insn,
265 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
267 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
269 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn,
271 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn,
273 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Insn,
275 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn,
277 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Insn,
279 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
281 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
283 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
285 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
287 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
289 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
291 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn,
293 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn,
295 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn,
297 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn,
299 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn,
301 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn,
303 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn,
305 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn,
307 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
309 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
311 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn,
313 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
315 Insn,
319 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
339 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
341 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
343 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn,
345 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
359 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
361 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
363 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
365 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn,
381 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst,unsigned Insn,
383 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst,unsigned Insn,
414 uint32_t Insn,
421 uint32_t Cond = (Insn >> 28) & 0xF;
449 uint32_t Insn =
454 decodeInstruction(DecoderTableARM32, MI, Insn, Address, this, STI);
457 return checkDecodedInstruction(MI, Size, Address, OS, CS, Insn, Result);
462 Result = decodeInstruction(DecoderTableVFP32, MI, Insn, Address, this, STI);
468 Result = decodeInstruction(DecoderTableVFPV832, MI, Insn, Address, this, STI);
475 decodeInstruction(DecoderTableNEONData32, MI, Insn, Address, this, STI);
485 Result = decodeInstruction(DecoderTableNEONLoadStore32, MI, Insn, Address,
497 decodeInstruction(DecoderTableNEONDup32, MI, Insn, Address, this, STI);
508 decodeInstruction(DecoderTablev8NEON32, MI, Insn, Address, this, STI);
515 decodeInstruction(DecoderTablev8Crypto32, MI, Insn, Address, this, STI);
1311 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
1315 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1316 unsigned CRd = fieldFromInstruction(Insn, 12, 4);
1317 unsigned coproc = fieldFromInstruction(Insn, 8, 4);
1318 unsigned imm = fieldFromInstruction(Insn, 0, 8);
1319 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1320 unsigned U = fieldFromInstruction(Insn, 23, 1);
1461 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn,
1465 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1466 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
1467 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1468 unsigned imm = fieldFromInstruction(Insn, 0, 12);
1469 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1470 unsigned reg = fieldFromInstruction(Insn, 25, 1);
1471 unsigned P = fieldFromInstruction(Insn, 24, 1);
1472 unsigned W = fieldFromInstruction(Insn, 21, 1);
1515 if (!fieldFromInstruction(Insn, 23, 1))
1532 switch( fieldFromInstruction(Insn, 5, 2)) {
1548 unsigned amt = fieldFromInstruction(Insn, 7, 5);
1610 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
1614 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
1615 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1616 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1617 unsigned type = fieldFromInstruction(Insn, 22, 1);
1618 unsigned imm = fieldFromInstruction(Insn, 8, 4);
1619 unsigned U = ((~fieldFromInstruction(Insn, 23, 1)) & 1) << 8;
1620 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1621 unsigned W = fieldFromInstruction(Insn, 21, 1);
1622 unsigned P = fieldFromInstruction(Insn, 24, 1);
1653 if (!type && fieldFromInstruction(Insn, 8, 4))
1801 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn,
1805 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1806 unsigned mode = fieldFromInstruction(Insn, 23, 2);
1830 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
1834 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
1835 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1836 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1837 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1840 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
1854 unsigned Insn,
1858 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1859 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1860 unsigned reglist = fieldFromInstruction(Insn, 0, 16);
1918 if (fieldFromInstruction(Insn, 20, 1) == 0) {
1920 if (!(fieldFromInstruction(Insn, 22, 1) == 1 &&
1921 fieldFromInstruction(Insn, 20, 1) == 0))
1925 MCOperand::createImm(fieldFromInstruction(Insn, 0, 4)));
1929 return DecodeRFEInstruction(Inst, Insn, Address, Decoder);
1944 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
1946 unsigned imod = fieldFromInstruction(Insn, 18, 2);
1947 unsigned M = fieldFromInstruction(Insn, 17, 1);
1948 unsigned iflags = fieldFromInstruction(Insn, 6, 3);
1949 unsigned mode = fieldFromInstruction(Insn, 0, 5);
1955 if (fieldFromInstruction(Insn, 5, 1) != 0 ||
1956 fieldFromInstruction(Insn, 16, 1) != 0 ||
1957 fieldFromInstruction(Insn, 20, 8) != 0x10)
1991 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
1993 unsigned imod = fieldFromInstruction(Insn, 9, 2);
1994 unsigned M = fieldFromInstruction(Insn, 8, 1);
1995 unsigned iflags = fieldFromInstruction(Insn, 5, 3);
1996 unsigned mode = fieldFromInstruction(Insn, 0, 5);
2023 int imm = fieldFromInstruction(Insn, 0, 8);
2033 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
2037 unsigned Rd = fieldFromInstruction(Insn, 8, 4);
2040 imm |= (fieldFromInstruction(Insn, 0, 8) << 0);
2041 imm |= (fieldFromInstruction(Insn, 12, 3) << 8);
2042 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2043 imm |= (fieldFromInstruction(Insn, 26, 1) << 11);
2057 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
2061 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2062 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2065 imm |= (fieldFromInstruction(Insn, 0, 12) << 0);
2066 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2084 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
2088 unsigned Rd = fieldFromInstruction(Insn, 16, 4);
2089 unsigned Rn = fieldFromInstruction(Insn, 0, 4);
2090 unsigned Rm = fieldFromInstruction(Insn, 8, 4);
2091 unsigned Ra = fieldFromInstruction(Insn, 12, 4);
2092 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2095 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
2112 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
2116 unsigned Pred = fieldFromInstruction(Insn, 28, 4);
2117 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2118 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2121 return DecodeSETPANInstruction(Inst, Insn, Address, Decoder);
2133 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
2137 unsigned Imm = fieldFromInstruction(Insn, 9, 1);
2148 if (fieldFromInstruction(Insn, 20,12) != 0xf11 ||
2149 fieldFromInstruction(Insn, 4,4) != 0)
2151 if (fieldFromInstruction(Insn, 10,10) != 0 ||
2152 fieldFromInstruction(Insn, 0,4) != 0)
2206 DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
2216 unsigned S = fieldFromInstruction(Insn, 26, 1);
2217 unsigned J1 = fieldFromInstruction(Insn, 13, 1);
2218 unsigned J2 = fieldFromInstruction(Insn, 11, 1);
2221 unsigned imm10 = fieldFromInstruction(Insn, 16, 10);
2222 unsigned imm11 = fieldFromInstruction(Insn, 0, 11);
2233 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
2237 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2238 unsigned imm = fieldFromInstruction(Insn, 0, 24) << 2;
2242 imm |= fieldFromInstruction(Insn, 24, 1) << 1;
2276 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,
2280 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2281 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2282 unsigned wb = fieldFromInstruction(Insn, 16, 4);
2283 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2284 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
2285 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2550 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn,
2552 unsigned type = fieldFromInstruction(Insn, 8, 4);
2553 unsigned align = fieldFromInstruction(Insn, 4, 2);
2558 unsigned load = fieldFromInstruction(Insn, 21, 1);
2559 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2560 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2563 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn,
2565 unsigned size = fieldFromInstruction(Insn, 6, 2);
2568 unsigned type = fieldFromInstruction(Insn, 8, 4);
2569 unsigned align = fieldFromInstruction(Insn, 4, 2);
2573 unsigned load = fieldFromInstruction(Insn, 21, 1);
2574 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2575 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2578 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn,
2580 unsigned size = fieldFromInstruction(Insn, 6, 2);
2583 unsigned align = fieldFromInstruction(Insn, 4, 2);
2586 unsigned load = fieldFromInstruction(Insn, 21, 1);
2587 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2588 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2591 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn,
2593 unsigned size = fieldFromInstruction(Insn, 6, 2);
2596 unsigned load = fieldFromInstruction(Insn, 21, 1);
2597 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2598 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2601 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn,
2605 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2606 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2607 unsigned wb = fieldFromInstruction(Insn, 16, 4);
2608 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2609 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
2610 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2872 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn,
2876 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2877 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2878 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2879 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2880 unsigned align = fieldFromInstruction(Insn, 4, 1);
2881 unsigned size = fieldFromInstruction(Insn, 6, 2);
2919 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn,
2923 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2924 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2925 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2926 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2927 unsigned align = fieldFromInstruction(Insn, 4, 1);
2928 unsigned size = 1 << fieldFromInstruction(Insn, 6, 2);
2967 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn,
2971 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2972 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2973 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2974 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2975 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
3002 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn,
3006 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3007 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3008 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3009 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3010 unsigned size = fieldFromInstruction(Insn, 6, 2);
3011 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
3012 unsigned align = fieldFromInstruction(Insn, 4, 1);
3055 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn,
3059 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3060 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3061 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3062 imm |= fieldFromInstruction(Insn, 16, 3) << 4;
3063 imm |= fieldFromInstruction(Insn, 24, 1) << 7;
3064 imm |= fieldFromInstruction(Insn, 8, 4) << 8;
3065 imm |= fieldFromInstruction(Insn, 5, 1) << 12;
3066 unsigned Q = fieldFromInstruction(Insn, 6, 1);
3100 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn,
3104 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3105 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3106 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3107 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3108 unsigned size = fieldFromInstruction(Insn, 18, 2);
3143 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
3147 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3148 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3149 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3150 Rn |= fieldFromInstruction(Insn, 7, 1) << 4;
3151 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3152 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3153 unsigned op = fieldFromInstruction(Insn, 6, 1);
3179 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
3183 unsigned dst = fieldFromInstruction(Insn, 8, 3);
3184 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3302 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn,
3306 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3307 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3342 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3375 unsigned addrmode = fieldFromInstruction(Insn, 4, 2);
3376 addrmode |= fieldFromInstruction(Insn, 0, 4) << 2;
3377 addrmode |= fieldFromInstruction(Insn, 16, 4) << 6;
3384 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
3388 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3389 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3390 unsigned U = fieldFromInstruction(Insn, 9, 1);
3391 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3394 unsigned add = fieldFromInstruction(Insn, 9, 1);
3428 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3468 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
3472 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3473 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3474 unsigned imm = fieldFromInstruction(Insn, 0, 12);
3509 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3548 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn,
3552 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3553 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3554 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3577 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3587 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
3591 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3592 unsigned U = fieldFromInstruction(Insn, 23, 1);
3593 int imm = fieldFromInstruction(Insn, 0, 12);
3743 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn,
3747 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3748 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3749 unsigned addr = fieldFromInstruction(Insn, 0, 8);
3750 addr |= fieldFromInstruction(Insn, 9, 1) << 8;
3752 unsigned load = fieldFromInstruction(Insn, 20, 1);
3782 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3830 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn,
3832 unsigned imm = fieldFromInstruction(Insn, 0, 7);
3841 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
3846 unsigned Rdm = fieldFromInstruction(Insn, 0, 3);
3847 Rdm |= fieldFromInstruction(Insn, 7, 1) << 3;
3855 unsigned Rm = fieldFromInstruction(Insn, 3, 4);
3866 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
3868 unsigned imod = fieldFromInstruction(Insn, 4, 1) | 0x2;
3869 unsigned flags = fieldFromInstruction(Insn, 0, 3);
3877 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
3880 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3881 unsigned add = fieldFromInstruction(Insn, 4, 1);
3930 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn,
3934 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3935 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3946 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn,
3950 unsigned pred = fieldFromInstruction(Insn, 22, 4);
3952 unsigned opc = fieldFromInstruction(Insn, 4, 28);
3967 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3971 unsigned brtarget = fieldFromInstruction(Insn, 0, 11) << 1;
3972 brtarget |= fieldFromInstruction(Insn, 11, 1) << 19;
3973 brtarget |= fieldFromInstruction(Insn, 13, 1) << 18;
3974 brtarget |= fieldFromInstruction(Insn, 16, 6) << 12;
3975 brtarget |= fieldFromInstruction(Insn, 26, 1) << 20;
4155 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
4159 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4160 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4161 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4176 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
4180 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4181 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
4182 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4183 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4201 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
4205 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4206 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4207 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4208 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4209 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4210 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4226 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
4230 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4231 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4232 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4233 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4234 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4235 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4236 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4254 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
4258 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4259 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4260 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4261 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4262 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4263 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4279 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
4283 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4284 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4285 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4286 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4287 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4288 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4304 Insn,
4308 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4309 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4310 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4311 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4312 unsigned size = fieldFromInstruction(Insn, 10, 2);
4320 if (fieldFromInstruction(Insn, 4, 1))
4322 index = fieldFromInstruction(Insn, 5, 3);
4325 if (fieldFromInstruction(Insn, 5, 1))
4327 index = fieldFromInstruction(Insn, 6, 2);
4328 if (fieldFromInstruction(Insn, 4, 1))
4332 if (fieldFromInstruction(Insn, 6, 1))
4334 index = fieldFromInstruction(Insn, 7, 1);
4336 switch (fieldFromInstruction(Insn, 4, 2)) {
4371 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn,
4375 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4376 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4377 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4378 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4379 unsigned size = fieldFromInstruction(Insn, 10, 2);
4387 if (fieldFromInstruction(Insn, 4, 1))
4389 index = fieldFromInstruction(Insn, 5, 3);
4392 if (fieldFromInstruction(Insn, 5, 1))
4394 index = fieldFromInstruction(Insn, 6, 2);
4395 if (fieldFromInstruction(Insn, 4, 1))
4399 if (fieldFromInstruction(Insn, 6, 1))
4401 index = fieldFromInstruction(Insn, 7, 1);
4403 switch (fieldFromInstruction(Insn, 4, 2)) {
4437 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn,
4441 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4442 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4443 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4444 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4445 unsigned size = fieldFromInstruction(Insn, 10, 2);
4454 index = fieldFromInstruction(Insn, 5, 3);
4455 if (fieldFromInstruction(Insn, 4, 1))
4459 index = fieldFromInstruction(Insn, 6, 2);
4460 if (fieldFromInstruction(Insn, 4, 1))
4462 if (fieldFromInstruction(Insn, 5, 1))
4466 if (fieldFromInstruction(Insn, 5, 1))
4468 index = fieldFromInstruction(Insn, 7, 1);
4469 if (fieldFromInstruction(Insn, 4, 1) != 0)
4471 if (fieldFromInstruction(Insn, 6, 1))
4504 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn,
4508 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4509 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4510 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4511 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4512 unsigned size = fieldFromInstruction(Insn, 10, 2);
4521 index = fieldFromInstruction(Insn, 5, 3);
4522 if (fieldFromInstruction(Insn, 4, 1))
4526 index = fieldFromInstruction(Insn, 6, 2);
4527 if (fieldFromInstruction(Insn, 4, 1))
4529 if (fieldFromInstruction(Insn, 5, 1))
4533 if (fieldFromInstruction(Insn, 5, 1))
4535 index = fieldFromInstruction(Insn, 7, 1);
4536 if (fieldFromInstruction(Insn, 4, 1) != 0)
4538 if (fieldFromInstruction(Insn, 6, 1))
4568 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn,
4572 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4573 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4574 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4575 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4576 unsigned size = fieldFromInstruction(Insn, 10, 2);
4585 if (fieldFromInstruction(Insn, 4, 1))
4587 index = fieldFromInstruction(Insn, 5, 3);
4590 if (fieldFromInstruction(Insn, 4, 1))
4592 index = fieldFromInstruction(Insn, 6, 2);
4593 if (fieldFromInstruction(Insn, 5, 1))
4597 if (fieldFromInstruction(Insn, 4, 2))
4599 index = fieldFromInstruction(Insn, 7, 1);
4600 if (fieldFromInstruction(Insn, 6, 1))
4638 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn,
4642 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4643 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4644 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4645 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4646 unsigned size = fieldFromInstruction(Insn, 10, 2);
4655 if (fieldFromInstruction(Insn, 4, 1))
4657 index = fieldFromInstruction(Insn, 5, 3);
4660 if (fieldFromInstruction(Insn, 4, 1))
4662 index = fieldFromInstruction(Insn, 6, 2);
4663 if (fieldFromInstruction(Insn, 5, 1))
4667 if (fieldFromInstruction(Insn, 4, 2))
4669 index = fieldFromInstruction(Insn, 7, 1);
4670 if (fieldFromInstruction(Insn, 6, 1))
4702 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn,
4706 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4707 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4708 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4709 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4710 unsigned size = fieldFromInstruction(Insn, 10, 2);
4719 if (fieldFromInstruction(Insn, 4, 1))
4721 index = fieldFromInstruction(Insn, 5, 3);
4724 if (fieldFromInstruction(Insn, 4, 1))
4726 index = fieldFromInstruction(Insn, 6, 2);
4727 if (fieldFromInstruction(Insn, 5, 1))
4731 switch (fieldFromInstruction(Insn, 4, 2)) {
4737 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
4740 index = fieldFromInstruction(Insn, 7, 1);
4741 if (fieldFromInstruction(Insn, 6, 1))
4783 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn,
4787 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4788 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4789 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4790 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4791 unsigned size = fieldFromInstruction(Insn, 10, 2);
4800 if (fieldFromInstruction(Insn, 4, 1))
4802 index = fieldFromInstruction(Insn, 5, 3);
4805 if (fieldFromInstruction(Insn, 4, 1))
4807 index = fieldFromInstruction(Insn, 6, 2);
4808 if (fieldFromInstruction(Insn, 5, 1))
4812 switch (fieldFromInstruction(Insn, 4, 2)) {
4818 Insn, 4, 2); break;
4821 index = fieldFromInstruction(Insn, 7, 1);
4822 if (fieldFromInstruction(Insn, 6, 1))
4855 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
4858 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4859 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
4860 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
4861 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4862 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
4881 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
4884 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4885 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
4886 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
4887 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4888 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
4907 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn,
4910 unsigned pred = fieldFromInstruction(Insn, 4, 4);
4911 unsigned mask = fieldFromInstruction(Insn, 0, 4);
4927 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
4931 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4932 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
4933 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4934 unsigned addr = fieldFromInstruction(Insn, 0, 8);
4935 unsigned W = fieldFromInstruction(Insn, 21, 1);
4936 unsigned U = fieldFromInstruction(Insn, 23, 1);
4937 unsigned P = fieldFromInstruction(Insn, 24, 1);
4964 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
4968 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4969 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
4970 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4971 unsigned addr = fieldFromInstruction(Insn, 0, 8);
4972 unsigned W = fieldFromInstruction(Insn, 21, 1);
4973 unsigned U = fieldFromInstruction(Insn, 23, 1);
4974 unsigned P = fieldFromInstruction(Insn, 24, 1);
4998 static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn,
5000 unsigned sign1 = fieldFromInstruction(Insn, 21, 1);
5001 unsigned sign2 = fieldFromInstruction(Insn, 23, 1);
5004 unsigned Val = fieldFromInstruction(Insn, 0, 8);
5005 Val |= fieldFromInstruction(Insn, 12, 3) << 8;
5006 Val |= fieldFromInstruction(Insn, 26, 1) << 11;
5024 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn,
5026 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5027 unsigned Rt2 = fieldFromInstruction(Insn, 0, 4);
5028 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5029 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5032 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
5051 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
5057 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
5058 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
5059 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
5060 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
5061 unsigned imm = fieldFromInstruction(Insn, 16, 6);
5062 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
5063 unsigned op = fieldFromInstruction(Insn, 5, 1);
5096 return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
5110 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn,
5116 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
5117 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
5118 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
5119 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
5120 unsigned imm = fieldFromInstruction(Insn, 16, 6);
5121 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
5122 unsigned op = fieldFromInstruction(Insn, 5, 1);
5155 return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);