Lines Matching refs:MO2
117 const MCOperand &MO2 = MI->getOperand(2);
130 printRegName(O, MO2.getReg());
140 const MCOperand &MO2 = MI->getOperand(2);
142 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()));
151 if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) {
157 << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())) << markup(">");
393 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
405 printRegName(O, MO2.getReg());
413 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
418 printRegImmShift(O, ARM_AM::getSORegShOp(MO2.getImm()),
419 ARM_AM::getSORegOffset(MO2.getImm()), UseMarkup);
430 const MCOperand &MO2 = MI->getOperand(Op + 1);
436 if (!MO2.getReg()) {
448 printRegName(O, MO2.getReg());
459 const MCOperand &MO2 = MI->getOperand(Op + 1);
463 printRegName(O, MO2.getReg());
471 const MCOperand &MO2 = MI->getOperand(Op + 1);
475 printRegName(O, MO2.getReg());
503 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
506 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
508 << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO2.getImm())) << ImmOffs
513 O << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO2.getImm()));
516 printRegImmShift(O, ARM_AM::getAM2ShiftOpc(MO2.getImm()),
517 ARM_AM::getAM2Offset(MO2.getImm()), UseMarkup);
528 const MCOperand &MO2 = MI->getOperand(Op + 1);
534 if (MO2.getReg()) {
536 printRegName(O, MO2.getReg());
573 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
576 O << getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm()));
581 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
583 << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm())) << ImmOffs
600 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
602 O << (MO2.getImm() ? "" : "-");
628 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
638 unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm());
639 ARM_AM::AddrOpc Op = ARM_AM::getAM5Op(MO2.getImm());
651 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
655 if (MO2.getImm()) {
656 O << ":" << (MO2.getImm() << 3);
1113 const MCOperand &MO2 = MI->getOperand(Op + 1);
1122 if (unsigned RegNum = MO2.getReg()) {
1135 const MCOperand &MO2 = MI->getOperand(Op + 1);
1144 if (unsigned ImmOffs = MO2.getImm()) {
1186 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1192 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
1193 printRegImmShift(O, ARM_AM::getSORegShOp(MO2.getImm()),
1194 ARM_AM::getSORegOffset(MO2.getImm()), UseMarkup);
1202 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1212 int32_t OffImm = (int32_t)MO2.getImm();
1231 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1236 int32_t OffImm = (int32_t)MO2.getImm();
1255 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1265 int32_t OffImm = (int32_t)MO2.getImm();
1285 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1289 if (MO2.getImm()) {
1290 O << ", " << markup("<imm:") << "#" << formatImm(MO2.getImm() * 4)
1334 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1340 assert(MO2.getReg() && "Invalid so_reg load / store address!");
1342 printRegName(O, MO2.getReg());
