Lines Matching defs:Zero
32 // P is sign- or zero-extended, locate the virtual register holding that
144 // registers. Such parameters can be sign- or zero-extended at the
254 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::Zero), Outputs);
263 RC.fill(0, L, BT::BitValue::Zero);
279 RC.fill(PW, RW, BT::BitValue::Zero);
366 RPC.fill(0, 2, BT::BitValue::Zero);
607 RC[im(2)] = BT::BitValue::Zero;
619 : RC[BX].is(1) ? BT::BitValue::Zero
628 const BT::BitValue Zero = BT::BitValue::Zero;
629 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero)
630 .fill(W1+(W1-BX), W0, Zero);
746 // Sign- and zero-extension:
805 RC.fill(0, W0, (All1 ? BT::BitValue::One : BT::BitValue::Zero));
822 RC.fill(0, W0, (Has1 ? BT::BitValue::One : BT::BitValue::Zero));
867 BT::BitValue F = V.is(TV) ? BT::BitValue::One : BT::BitValue::Zero;
1087 Res[i] = BT::BitValue::Zero;
1112 // register, and make zero-/sign-extends possible (otherwise we would be ex-
