Lines Matching defs:Rs
116 // Rd = ALLOCA Rs, A
119 // Rs - minimum size (the actual allocated can be larger to accommodate
1015 MachineFunction &MF, RegScavenger *RS) const {
1151 RegScavenger *RS) const {
1152 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
1177 RS->addScavengingFrameIndex(
1337 // Rd = alloca Rs, #A
1339 // If Rs and Rd are different registers, use this sequence:
1340 // Rd = sub(r29, Rs)
1341 // r29 = sub(r29, Rs)
1346 // Rd = sub(r29, Rs)
1353 unsigned Rd = RdOp.getReg(), Rs = RsOp.getReg();
1355 // Rd = sub(r29, Rs)
1358 .addReg(Rs);
1359 if (Rs != Rd) {
1360 // r29 = sub(r29, Rs)
1363 .addReg(Rs);
1370 if (Rs != Rd)
1375 if (Rs == Rd) {
