Lines Matching refs:v2i16
239 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
403 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
1227 if (LHSVT == MVT::v2i16) {
1271 if (OpVT == MVT::v2i16) {
1275 SDValue TR = DAG.getNode(ISD::TRUNCATE, DL, MVT::v2i16, SL);
1553 addRegisterClass(MVT::v2i16, &Hexagon::IntRegsRegClass);
1735 promoteLdStType(MVT::v2i16, MVT::i32);
1789 MVT::v4i8, MVT::v8i8, MVT::v2i16, MVT::v4i16, MVT::v1i32,
1806 setOperationAction(ISD::SETCC, MVT::v2i16, Custom);
1807 setOperationAction(ISD::VSELECT, MVT::v2i16, Custom);
2257 // Try to generate a S2_packhl to build v2i16 vectors.
2258 if (VT.getSimpleVT() == MVT::v2i16) {
2269 return DAG.getTargetExtractSubreg(Hexagon::subreg_loreg, dl, MVT::v2i16,
2357 // We are trying to concat two v2i16 to a single v4i16, or two v4i8
2359 if (ST == MVT::v2i16 || ST == MVT::v4i8)
