Lines Matching refs:Hexagon
24 using namespace Hexagon;
26 #define DEBUG_TYPE "hexagon-mcduplex-info"
191 case Hexagon::L2_loadri_io:
198 Hexagon::R29 == SrcReg && inRange<5, 2>(MCI, 2)) {
208 case Hexagon::L2_loadrub_io:
228 case Hexagon::L2_loadrh_io:
229 case Hexagon::L2_loadruh_io:
239 case Hexagon::L2_loadrb_io:
249 case Hexagon::L2_loadrd_io:
254 HexagonMCInstrInfo::isIntReg(SrcReg) && Hexagon::R29 == SrcReg &&
260 case Hexagon::L4_return:
262 case Hexagon::L2_deallocframe:
265 case Hexagon::EH_RETURN_JMPR:
267 case Hexagon::J2_jumpr:
268 case Hexagon::JMPret:
272 if (Hexagon::R31 == DstReg) {
277 case Hexagon::J2_jumprt:
278 case Hexagon::J2_jumprf:
279 case Hexagon::J2_jumprtnew:
280 case Hexagon::J2_jumprfnew:
281 case Hexagon::JMPrett:
282 case Hexagon::JMPretf:
283 case Hexagon::JMPrettnew:
284 case Hexagon::JMPretfnew:
285 case Hexagon::JMPrettnewpt:
286 case Hexagon::JMPretfnewpt:
290 if ((HexagonMCInstrInfo::isPredReg(SrcReg) && (Hexagon::P0 == SrcReg)) &&
291 (Hexagon::R31 == DstReg)) {
295 case Hexagon::L4_return_t:
297 case Hexagon::L4_return_f:
299 case Hexagon::L4_return_tnew_pnt:
301 case Hexagon::L4_return_fnew_pnt:
303 case Hexagon::L4_return_tnew_pt:
305 case Hexagon::L4_return_fnew_pt:
308 if (Hexagon::P0 == SrcReg) {
317 case Hexagon::S2_storeri_io:
324 Hexagon::R29 == Src1Reg && inRange<5, 2>(MCI, 1)) {
334 case Hexagon::S2_storerb_io:
353 case Hexagon::S2_storerh_io:
363 case Hexagon::S2_storerd_io:
368 HexagonMCInstrInfo::isIntReg(Src1Reg) && Hexagon::R29 == Src1Reg &&
373 case Hexagon::S4_storeiri_io:
381 case Hexagon::S4_storeirb_io:
389 case Hexagon::S2_allocframe:
411 case Hexagon::A2_addi:
416 if (HexagonMCInstrInfo::isIntReg(SrcReg) && Hexagon::R29 == SrcReg &&
432 case Hexagon::A2_add:
442 case Hexagon::A2_andir:
451 case Hexagon::A2_tfr:
460 case Hexagon::A2_tfrsi:
467 case Hexagon::C2_cmoveit:
468 case Hexagon::C2_cmovenewit:
469 case Hexagon::C2_cmoveif:
470 case Hexagon::C2_cmovenewif:
477 Hexagon::P0 == PredReg && minConstant(MCI, 2) == 0) {
481 case Hexagon::C2_cmpeqi:
485 if (Hexagon::P0 == DstReg &&
491 case Hexagon::A2_combineii:
492 case Hexagon::A4_combineii:
500 case Hexagon::A4_combineri:
510 case Hexagon::A4_combineir:
520 case Hexagon
521 case Hexagon::A2_sxth:
522 case Hexagon::A2_zxtb:
523 case Hexagon::A2_zxth:
540 case Hexagon::A2_addi:
552 case Hexagon::A2_tfrsi:
584 if ((Opcode != Hexagon::A2_addi) && (Opcode != Hexagon::A2_tfrsi))
608 if (MIb.getOpcode() == Hexagon::S2_allocframe)
627 (MIb.getOperand(1).getReg() == Hexagon::R31))
630 (MIb.getOperand(0).getReg() == Hexagon::R31))
658 case Hexagon::R0:
659 case Hexagon::R1:
660 case Hexagon::R2:
661 case Hexagon::R3:
662 case Hexagon::R4:
663 case Hexagon::R5:
664 case Hexagon::R6:
665 case Hexagon::R7:
666 case Hexagon::D0:
667 case Hexagon::D1:
668 case Hexagon::D2:
669 case Hexagon::D3:
670 case Hexagon::R16:
671 case Hexagon::R17:
672 case Hexagon::R18:
673 case Hexagon::R19:
674 case Hexagon::R20:
675 case Hexagon::R21:
676 case Hexagon::R22:
677 case Hexagon::R23:
678 case Hexagon::D8:
679 case Hexagon::D9:
680 case Hexagon::D10:
681 case Hexagon::D11:
698 case Hexagon::A2_addi:
702 Result.setOpcode(Hexagon::V4_SA1_inc);
708 Result.setOpcode(Hexagon::V4_SA1_dec);
713 else if (Inst.getOperand(1).getReg() == Hexagon::R29) {
714 Result.setOpcode(Hexagon::V4_SA1_addsp);
720 Result.setOpcode(Hexagon::V4_SA1_addi);
726 case Hexagon::A2_add:
727 Result.setOpcode(Hexagon::V4_SA1_addrx);
732 case Hexagon::S2_allocframe:
733 Result.setOpcode(Hexagon::V4_SS2_allocframe);
736 case Hexagon::A2_andir:
738 Result.setOpcode(Hexagon::V4_SA1_zxtb);
743 Result.setOpcode(Hexagon::V4_SA1_and1);
748 case Hexagon::C2_cmpeqi:
749 Result.setOpcode(Hexagon::V4_SA1_cmpeqi);
753 case Hexagon::A4_combineii:
754 case Hexagon::A2_combineii:
758 Result.setOpcode(Hexagon::V4_SA1_combine1i);
764 Result.setOpcode(Hexagon::V4_SA1_combine3i);
770 Result.setOpcode(Hexagon::V4_SA1_combine0i);
776 Result.setOpcode(Hexagon::V4_SA1_combine2i);
781 case Hexagon::A4_combineir:
782 Result.setOpcode(Hexagon::V4_SA1_combinezr);
787 case Hexagon::A4_combineri:
788 Result.setOpcode(Hexagon::V4_SA1_combinerz);
792 case Hexagon::L4_return_tnew_pnt:
793 case Hexagon::L4_return_tnew_pt:
794 Result.setOpcode(Hexagon::V4_SL2_return_tnew);
796 case Hexagon::L4_return_fnew_pnt:
797 case Hexagon::L4_return_fnew_pt:
798 Result.setOpcode(Hexagon::V4_SL2_return_fnew);
800 case Hexagon::L4_return_f:
801 Result.setOpcode(Hexagon::V4_SL2_return_f);
803 case Hexagon::L4_return_t:
804 Result.setOpcode(Hexagon::V4_SL2_return_t);
806 case Hexagon::L4_return:
807 Result.setOpcode(Hexagon::V4_SL2_return);
809 case Hexagon::L2_deallocframe:
810 Result.setOpcode(Hexagon::V4_SL2_deallocframe);
812 case Hexagon::EH_RETURN_JMPR:
813 case Hexagon::J2_jumpr:
814 case Hexagon::JMPret:
815 Result.setOpcode(Hexagon::V4_SL2_jumpr31);
817 case Hexagon::J2_jumprf:
818 case Hexagon::JMPretf:
819 Result.setOpcode(Hexagon::V4_SL2_jumpr31_f);
821 case Hexagon::J2_jumprfnew:
822 case Hexagon::JMPretfnewpt:
823 case Hexagon::JMPretfnew:
824 Result.setOpcode(Hexagon::V4_SL2_jumpr31_fnew);
826 case Hexagon::J2_jumprt:
827 case Hexagon::JMPrett:
828 Result.setOpcode(Hexagon::V4_SL2_jumpr31_t);
830 case Hexagon::J2_jumprtnew:
831 case Hexagon::JMPrettnewpt:
832 case Hexagon::JMPrettnew:
833 Result.setOpcode(Hexagon::V4_SL2_jumpr31_tnew);
835 case Hexagon::L2_loadrb_io:
836 Result.setOpcode(Hexagon::V4_SL2_loadrb_io);
841 case Hexagon::L2_loadrd_io:
842 Result.setOpcode(Hexagon::V4_SL2_loadrd_sp);
846 case Hexagon::L2_loadrh_io:
847 Result.setOpcode(Hexagon::V4_SL2_loadrh_io);
852 case Hexagon::L2_loadrub_io:
853 Result.setOpcode(Hexagon::V4_SL1_loadrub_io);
858 case Hexagon::L2_loadruh_io:
859 Result.setOpcode(Hexagon::V4_SL2_loadruh_io);
864 case Hexagon::L2_loadri_io:
865 if (Inst.getOperand(1).getReg() == Hexagon::R29) {
866 Result.setOpcode(Hexagon::V4_SL2_loadri_sp);
871 Result.setOpcode(Hexagon::V4_SL1_loadri_io);
877 case Hexagon::S4_storeirb_io:
881 Result.setOpcode(Hexagon::V4_SS2_storebi0);
886 Result.setOpcode(Hexagon::V4_SS2_storebi1);
891 case Hexagon::S2_storerb_io:
892 Result.setOpcode(Hexagon::V4_SS1_storeb_io);
897 case Hexagon::S2_storerd_io:
898 Result.setOpcode(Hexagon::V4_SS2_stored_sp);
902 case Hexagon::S2_storerh_io:
903 Result.setOpcode(Hexagon::V4_SS2_storeh_io);
908 case Hexagon::S4_storeiri_io:
912 Result.setOpcode(Hexagon::V4_SS2_storewi0);
917 Result.setOpcode(Hexagon::V4_SS2_storewi1);
921 } else if (Inst.getOperand(0).getReg() == Hexagon::R29) {
922 Result.setOpcode(Hexagon::V4_SS2_storew_sp);
927 case Hexagon::S2_storeri_io:
928 if (Inst.getOperand(0).getReg() == Hexagon::R29) {
929 Result.setOpcode(Hexagon::V4_SS2_storew_sp);
933 Result.setOpcode(Hexagon::V4_SS1_storew_io);
939 case Hexagon::A2_sxtb:
940 Result.setOpcode(Hexagon::V4_SA1_sxtb);
944 case Hexagon::A2_sxth:
945 Result.setOpcode(Hexagon::V4_SA1_sxth);
949 case Hexagon::A2_tfr:
950 Result.setOpcode(Hexagon::V4_SA1_tfr);
954 case Hexagon::C2_cmovenewif:
955 Result.setOpcode(Hexagon::V4_SA1_clrfnew);
958 case Hexagon::C2_cmovenewit:
959 Result.setOpcode(Hexagon::V4_SA1_clrtnew);
962 case Hexagon::C2_cmoveif:
963 Result.setOpcode(Hexagon::V4_SA1_clrf);
966 case Hexagon::C2_cmoveit:
967 Result.setOpcode(Hexagon::V4_SA1_clrt);
970 case Hexagon::A2_tfrsi:
973 Result.setOpcode(Hexagon::V4_SA1_setin1);
977 Result.setOpcode(Hexagon::V4_SA1_seti);
982 case Hexagon::A2_zxtb:
983 Result.setOpcode(Hexagon
988 case Hexagon::A2_zxth:
989 Result.setOpcode(Hexagon::V4_SA1_zxth);
999 case Hexagon::S2_storeri_io:
1000 case Hexagon::S2_storerb_io:
1001 case Hexagon::S2_storerh_io:
1002 case Hexagon::S2_storerd_io:
1003 case Hexagon::S4_storeiri_io:
1004 case Hexagon::S4_storeirb_io:
1005 case Hexagon::S2_allocframe:
