Lines Matching refs:Mips
1 //===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===//
71 case Mips::fixup_Mips_NONE:
73 case Mips::fixup_Mips_16:
76 case Mips::fixup_Mips_32:
83 case Mips::fixup_Mips_Branch_PCRel:
84 case Mips::fixup_Mips_PC16:
86 case Mips::fixup_MICROMIPS_PC7_S1:
88 case Mips::fixup_MICROMIPS_PC10_S1:
90 case Mips::fixup_MICROMIPS_PC16_S1:
92 case Mips::fixup_MIPS_PC19_S2:
94 case Mips::fixup_MIPS_PC18_S3:
96 case Mips::fixup_MIPS_PC21_S2:
98 case Mips::fixup_MIPS_PC26_S2:
100 case Mips::fixup_MIPS_PCHI16:
102 case Mips::fixup_MIPS_PCLO16:
110 case Mips::fixup_Mips_64:
122 case Mips::fixup_Mips_GPREL16:
124 case Mips::fixup_Mips_26:
126 case Mips::fixup_Mips_CALL16:
128 case Mips::fixup_Mips_GOT_Global:
129 case Mips::fixup_Mips_GOT_Local:
131 case Mips::fixup_Mips_HI16:
133 case Mips::fixup_Mips_LO16:
135 case Mips::fixup_Mips_TLSGD:
137 case Mips::fixup_Mips_GOTTPREL:
139 case Mips::fixup_Mips_TPREL_HI:
141 case Mips::fixup_Mips_TPREL_LO:
143 case Mips::fixup_Mips_TLSLDM:
145 case Mips::fixup_Mips_DTPREL_HI:
147 case Mips::fixup_Mips_DTPREL_LO:
149 case Mips::fixup_Mips_GOT_PAGE:
151 case Mips::fixup_Mips_GOT_OFST:
153 case Mips::fixup_Mips_GOT_DISP:
155 case Mips::fixup_Mips_GPOFF_HI: {
162 case Mips::fixup_Mips_GPOFF_LO: {
169 case Mips::fixup_Mips_HIGHER:
171 case Mips::fixup_Mips_HIGHEST:
173 case Mips::fixup_Mips_GOT_HI16:
175 case Mips::fixup_Mips_GOT_LO16:
177 case Mips::fixup_Mips_CALL_HI16:
179 case Mips::fixup_Mips_CALL_LO16:
181 case Mips::fixup_MICROMIPS_26_S1:
183 case Mips::fixup_MICROMIPS_HI16:
185 case Mips::fixup_MICROMIPS_LO16:
187 case Mips::fixup_MICROMIPS_GOT16:
189 case Mips::fixup_MICROMIPS_CALL16:
191 case Mips::fixup_MICROMIPS_GOT_DISP:
193 case Mips::fixup_MICROMIPS_GOT_PAGE:
195 case Mips::fixup_MICROMIPS_GOT_OFST:
197 case Mips::fixup_MICROMIPS_TLS_GD:
199 case Mips::fixup_MICROMIPS_TLS_LDM:
201 case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
203 case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
205 case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
207 case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
283 // Mips instructions have fixed length of at least two bytes (two for
292 // required by MIPS ABI: every *HI16 relocation must be immediately followed by
