Lines Matching refs:Mips
1 //===-- MipsNaClELFStreamer.cpp - ELF Object Output for Mips NaCl ---------===//
10 // This file implements MCELFStreamer for Mips NaCl. It emits .o object files
20 #include "Mips.h"
27 #define DEBUG_TYPE "mips-mc-nacl"
31 const unsigned IndirectBranchMaskReg = Mips::T6;
32 const unsigned LoadStoreStackMaskReg = Mips::T7;
51 if (MI.getOpcode() == Mips::JALR) {
55 return MI.getOperand(0).getReg() == Mips::ZERO;
57 return MI.getOpcode() == Mips::JR;
62 && MI.getOperand(0).getReg() == Mips::SP);
74 case Mips::JAL:
75 case Mips::BAL:
76 case Mips::BAL_BR:
77 case Mips::BLTZAL:
78 case Mips::BGEZAL:
81 case Mips::JALR:
85 if (MI.getOperand(0).getReg() == Mips::ZERO)
96 MaskInst.setOpcode(Mips::AND);
129 assert((Mips::SP == SPReg) && "Unexpected stack-pointer register.");
212 case Mips::LB:
213 case Mips::LBu:
214 case Mips::LH:
215 case Mips::LHu:
216 case Mips::LW:
217 case Mips::LWC1:
218 case Mips::LDC1:
219 case Mips::LL:
220 case Mips::LL_R6:
221 case Mips::LWL:
222 case Mips::LWR:
227 case Mips::SB:
228 case Mips::SH:
229 case Mips::SW:
230 case Mips::SWC1:
231 case Mips::SDC1:
232 case Mips::SWL:
233 case Mips::SWR:
240 case Mips::SC:
241 case Mips::SC_R6:
251 return Reg != Mips::SP && Reg != Mips::T8;
