Lines Matching refs:Mips
16 #include "Mips.h"
37 #define DEBUG_TYPE "mips-isel"
55 unsigned Opcode = Mips::Mflo16;
60 unsigned Opcode = Mips::Mfhi16;
78 const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;
84 BuildMI(MBB, I, DL, TII.get(Mips::GotPrologue16), V0).
89 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16);
90 BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg)
109 BuildMI(MBB, I, DL, TII.get(Mips::MoveR3216), Mips16SPAliasReg)
110 .addReg(Mips::SP);
129 SDValue AliasFPReg = CurDAG->getRegister(Mips::S0, PtrVT);
158 AliasReg = CurDAG->getRegister(Mips::SP, PtrVT);
270 MOp = Mips::AdduRxRyRz16;
273 MOp = Mips::SubuRxRyRz16;
283 unsigned Sltu_op = Mips::SltuRxRyRz16;
285 unsigned Addu_op = Mips::AdduRxRyRz16;
297 MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MultuRxRy16 : Mips::MultRxRy16);
311 MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16);
