Lines Matching refs:MipsTargetLowering
74 SDValue MipsTargetLowering::getGlobalReg(SelectionDAG &DAG, EVT Ty) const {
79 SDValue MipsTargetLowering::getTargetNode(GlobalAddressSDNode *N, EVT Ty,
85 SDValue MipsTargetLowering::getTargetNode(ExternalSymbolSDNode *N, EVT Ty,
91 SDValue MipsTargetLowering::getTargetNode(BlockAddressSDNode *N, EVT Ty,
97 SDValue MipsTargetLowering::getTargetNode(JumpTableSDNode *N, EVT Ty,
103 SDValue MipsTargetLowering::getTargetNode(ConstantPoolSDNode *N, EVT Ty,
110 const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
225 MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
446 const MipsTargetLowering *MipsTargetLowering::create(const MipsTargetMachine &TM,
456 MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
463 EVT MipsTargetLowering::getSetCCResultType(const DataLayout &, LLVMContext &,
811 SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
837 bool MipsTargetLowering::isCheapToSpeculateCttz() const {
841 bool MipsTargetLowering::isCheapToSpeculateCtlz() const {
846 MipsTargetLowering::LowerOperationWrapper(SDNode *N,
856 MipsTargetLowering::ReplaceNodeResults(SDNode *N,
862 SDValue MipsTargetLowering::
939 MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
1056 MipsTargetLowering::emitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB,
1143 MachineBasicBlock *MipsTargetLowering::emitSignExtendToI32InReg(
1173 MachineBasicBlock *MipsTargetLowering::emitAtomicBinaryPartword(
1325 MachineBasicBlock * MipsTargetLowering::emitAtomicCmpSwap(MachineInstr *MI,
1410 MipsTargetLowering::emitAtomicCmpSwapPartword(MachineInstr *MI,
1552 MachineBasicBlock *MipsTargetLowering::emitSEL_D(MachineInstr *MI,
1581 SDValue MipsTargetLowering::lowerBR_JT(SDValue Op, SelectionDAG &DAG) const {
1613 SDValue MipsTargetLowering::lowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
1637 SDValue MipsTargetLowering::
1651 SDValue MipsTargetLowering::
1665 SDValue MipsTargetLowering::lowerSETCC(SDValue Op, SelectionDAG &DAG) const {
1679 SDValue MipsTargetLowering::lowerGlobalAddress(SDValue Op,
1712 SDValue MipsTargetLowering::lowerBlockAddress(SDValue Op,
1723 SDValue MipsTargetLowering::
1805 SDValue MipsTargetLowering::
1817 SDValue MipsTargetLowering::
1839 SDValue MipsTargetLowering::lowerVASTART(SDValue Op, SelectionDAG &DAG) const {
1854 SDValue MipsTargetLowering::lowerVAARG(SDValue Op, SelectionDAG &DAG) const {
2012 MipsTargetLowering::lowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const {
2019 SDValue MipsTargetLowering::
2034 SDValue MipsTargetLowering::lowerRETURNADDR(SDValue Op,
2058 SDValue MipsTargetLowering::lowerEH_RETURN(SDValue Op, SelectionDAG &DAG)
2082 SDValue MipsTargetLowering::lowerATOMIC_FENCE(SDValue Op,
2092 SDValue MipsTargetLowering::lowerShiftLeftParts(SDValue Op,
2123 SDValue MipsTargetLowering::lowerShiftRightParts(SDValue Op, SelectionDAG &DAG,
2182 SDValue MipsTargetLowering::lowerLOAD(SDValue Op, SelectionDAG &DAG) const {
2307 SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const {
2320 SDValue MipsTargetLowering::lowerADD(SDValue Op, SelectionDAG &DAG) const {
2342 SDValue MipsTargetLowering::lowerFP_TO_SINT(SDValue Op,
2491 MipsTargetLowering::passArgOnStack(SDValue StackPtr, unsigned Offset,
2509 void MipsTargetLowering::
2572 MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
2818 SDValue MipsTargetLowering::LowerCallResult(
2941 MipsTargetLowering::LowerFormalArguments(SDValue Chain,
3100 MipsTargetLowering::CanLowerReturn(CallingConv::ID CallConv,
3110 MipsTargetLowering::shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const {
3119 MipsTargetLowering::LowerInterruptReturn(SmallVectorImpl<SDValue> &RetOps,
3131 MipsTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
3239 MipsTargetLowering::ConstraintType
3240 MipsTargetLowering::getConstraintType(StringRef Constraint) const {
3277 MipsTargetLowering::getSingleConstraintMatchWeight(
3350 std::pair<unsigned, const TargetRegisterClass *> MipsTargetLowering::
3428 MipsTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
3491 void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
3585 bool MipsTargetLowering::isLegalAddressingMode(const DataLayout &DL,
3607 MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
3612 EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
3623 bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
3631 unsigned MipsTargetLowering::getJumpTableEncoding() const {
3638 bool MipsTargetLowering::useSoftFloat() const {
3642 void MipsTargetLowering::copyByValRegs(
3690 void MipsTargetLowering::passByValArg(
3788 void MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains,
3836 void MipsTargetLowering::HandleByVal(CCState *State, unsigned &Size,
3882 MipsTargetLowering::emitPseudoSELECT(MachineInstr *MI, MachineBasicBlock *BB,
3959 unsigned MipsTargetLowering::getRegisterByName(const char* RegName, EVT VT,
