Lines Matching refs:Mips
1 //===-- MipsRegisterInfo.cpp - MIPS Register Information -== --------------===//
10 // This file contains the MIPS implementation of the TargetRegisterInfo class.
15 #include "Mips.h"
42 #define DEBUG_TYPE "mips-reg-info"
47 MipsRegisterInfo::MipsRegisterInfo() : MipsGenRegisterInfo(Mips::RA) {}
49 unsigned MipsRegisterInfo::getPICCallReg() { return Mips::T9; }
55 return ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
64 case Mips::GPR32RegClassID:
65 case Mips::GPR64RegClassID:
66 case Mips::DSPRRegClassID: {
70 case Mips::FGR32RegClassID:
72 case Mips::AFGR64RegClassID:
74 case Mips::FGR64RegClassID:
83 /// Mips Callee Saved Registers
144 Mips::ZERO, Mips::K0, Mips::K1, Mips::SP
148 Mips::ZERO_64, Mips::K0_64, Mips::K1_64, Mips::SP_64
160 Reserved.set(Mips::T6); // Reserved for control flow mask.
161 Reserved.set(Mips::T7); // Reserved for memory access mask.
162 Reserved.set(Mips::T8); // Reserved for thread pointer.
170 Reserved.set(Mips::GP);
171 Reserved.set(Mips::GP_64);
176 for (RegIter Reg = Mips::AFGR64RegClass.begin(),
177 EReg = Mips::AFGR64RegClass.end(); Reg != EReg; ++Reg)
181 for (RegIter Reg = Mips::FGR64RegClass.begin(),
182 EReg = Mips::FGR64RegClass.end(); Reg != EReg; ++Reg)
188 Reserved.set(Mips::S0);
190 Reserved.set(Mips::FP);
191 Reserved.set(Mips::FP_64);
198 Reserved.set(Mips::S7);
199 Reserved.set(Mips::S7_64);
205 Reserved.set(Mips::HWR29);
208 Reserved.set(Mips::DSPPos);
209 Reserved.set(Mips::DSPSCount);
210 Reserved.set(Mips::DSPCarry);
211 Reserved.set(Mips::DSPEFI);
212 Reserved.set(Mips::DSPOutFlag);
215 Reserved.set(Mips::MSAIR);
216 Reserved.set(Mips::MSACSR);
217 Reserved.set(Mips::MSAAccess);
218 Reserved.set(Mips::MSASave);
219 Reserved.set(Mips::MSAModify);
220 Reserved.set(Mips::MSARequest);
221 Reserved.set(Mips::MSAMap);
222 Reserved.set(Mips::MSAUnmap);
227 Reserved.set(Mips::RA);
228 Reserved.set(Mips::RA_64);
229 Reserved.set(Mips::T0);
230 Reserved.set(Mips::T1);
232 Reserved.set(Mips::S2);
237 Reserved.set(Mips::GP);
238 Reserved.set(Mips::GP_64);
242 for (const auto &Reg : Mips::OddSPRegClass)
290 return TFI->hasFP(MF) ? Mips::S0 : Mips::SP;
292 return TFI->hasFP(MF) ? (IsN64 ? Mips::FP_64 : Mips::FP) :
293 (IsN64 ? Mips::SP_64 : Mips::SP);
308 unsigned FP = Subtarget.isGP32bit() ? Mips::FP : Mips::FP_64;
309 unsigned BP = Subtarget.isGP32bit() ? Mips::S7 : Mips::S7_64;
