Lines Matching defs:ResTy
1375 EVT ResTy = Op->getValueType(0);
1378 SDValue Result = DAG.getNode(Opc, DL, ResTy, Vec, Idx,
1499 EVT ResTy = Op->getValueType(0);
1501 SDValue One = DAG.getConstant(1, DL, ResTy);
1502 SDValue Bit = DAG.getNode(ISD::SHL, DL, ResTy, One, Op->getOperand(2));
1504 return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1),
1505 DAG.getNOT(DL, Bit, ResTy));
1510 EVT ResTy = Op->getValueType(0);
1511 APInt BitImm = APInt(ResTy.getVectorElementType().getSizeInBits(), 1)
1513 SDValue BitMask = DAG.getConstant(~BitImm, DL, ResTy);
1515 return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1), BitMask);
1857 EVT ResTy = Op->getValueType(0);
1858 SmallVector<SDValue, 16> Ops(ResTy.getVectorNumElements(),
1861 // If ResTy is v2i64 then the type legalizer will break this node down into
1863 return DAG.getNode(ISD::BUILD_VECTOR, DL, ResTy, Ops);
1868 EVT ResTy = Op->getValueType(0);
1870 ISD::FMUL, SDLoc(Op), ResTy, Op->getOperand(1),
1871 DAG.getNode(ISD::FEXP2, SDLoc(Op), ResTy, Op->getOperand(2)));
1889 EVT ResTy = Op->getValueType(0);
1890 return DAG.getNode(ISD::FSUB, SDLoc(Op), ResTy, Op->getOperand(1),
1891 DAG.getNode(ISD::FMUL, SDLoc(Op), ResTy,
1958 EVT ResTy = Op->getValueType(0);
1959 return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1),
1960 DAG.getNode(ISD::SHL, SDLoc(Op), ResTy,
1967 EVT ResTy = Op->getValueType(0);
1968 return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1),
1969 DAG.getNode(ISD::MUL, SDLoc(Op), ResTy,
2042 EVT ResTy = Op->getValueType(0);
2043 return DAG.getNode(ISD::SUB, SDLoc(Op), ResTy, Op->getOperand(1),
2044 DAG.getNode(ISD::MUL, SDLoc(Op), ResTy,
2177 EVT ResTy = Op->getValueType(0);
2182 return DAG.getLoad(ResTy, DL, ChainIn, Address, MachinePointerInfo(), false,
2296 EVT ResTy = Op->getValueType(0);
2303 if (ResTy.isInteger()) {
2306 return DAG.getNode(MipsISD::VEXTRACT_SEXT_ELT, DL, ResTy, Op0, Op1,
2346 EVT ResTy = Op->getValueType(0);
2352 if (!Subtarget.hasMSA() || !ResTy.is128BitVector())
2367 if (ResTy.isInteger() && !HasAnyUndefs && SplatValue.isSignedIntN(10))
2393 if (ViaVecTy != ResTy)
2394 Result = DAG.getNode(ISD::BITCAST, SDLoc(Node), ResTy, Result);
2403 EVT ResTy = Node->getValueType(0);
2405 assert(ResTy.isVector());
2407 unsigned NumElts = ResTy.getVectorNumElements();
2408 SDValue Vector = DAG.getUNDEF(ResTy);
2410 Vector = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, ResTy, Vector,
2438 static SDValue lowerVECTOR_SHUFFLE_SHF(SDValue Op, EVT ResTy,
2483 return DAG.getNode(MipsISD::SHF, DL, ResTy,
2518 static bool isVECTOR_SHUFFLE_SPLATI(SDValue Op, EVT ResTy,
2550 static SDValue lowerVECTOR_SHUFFLE_ILVEV(SDValue Op, EVT ResTy,
2578 return DAG.getNode(MipsISD::ILVEV, SDLoc(Op), ResTy, Ws, Wt);
2596 static SDValue lowerVECTOR_SHUFFLE_ILVOD(SDValue Op, EVT ResTy,
2624 return DAG.getNode(MipsISD::ILVOD, SDLoc(Op), ResTy, Wt, Ws);
2643 static SDValue lowerVECTOR_SHUFFLE_ILVR(SDValue Op, EVT ResTy,
2671 return DAG.getNode(MipsISD::ILVR, SDLoc(Op), ResTy, Ws, Wt);
2690 static SDValue lowerVECTOR_SHUFFLE_ILVL(SDValue Op, EVT ResTy,
2720 return DAG.getNode(MipsISD::ILVL, SDLoc(Op), ResTy, Ws, Wt);
2738 static SDValue lowerVECTOR_SHUFFLE_PCKEV(SDValue Op, EVT ResTy,
2763 return DAG.getNode(MipsISD::PCKEV, SDLoc(Op), ResTy, Ws, Wt);
2781 static SDValue lowerVECTOR_SHUFFLE_PCKOD(SDValue Op, EVT ResTy,
2806 return DAG.getNode(MipsISD::PCKOD, SDLoc(Op), ResTy, Ws, Wt);
2817 static SDValue lowerVECTOR_SHUFFLE_VSHF(SDValue Op, EVT ResTy,
2823 EVT MaskVecTy = ResTy.changeVectorElementTypeToInteger();
2828 int ResTyNumElts = ResTy.getVectorNumElements();
2863 return DAG.getNode(MipsISD::VSHF, DL, ResTy, MaskVec, Op1, Op0);
2871 EVT ResTy = Op->getValueType(0);
2873 if (!ResTy.is128BitVector())
2876 int ResTyNumElts = ResTy.getVectorNumElements();
2884 if (isVECTOR_SHUFFLE_SPLATI(Op, ResTy, Indices, DAG))
2885 return lowerVECTOR_SHUFFLE_VSHF(Op, ResTy, Indices, DAG);
2886 SDValue Result = lowerVECTOR_SHUFFLE_ILVEV(Op, ResTy, Indices, DAG);
2889 Result = lowerVECTOR_SHUFFLE_ILVOD(Op, ResTy, Indices, DAG);
2892 Result = lowerVECTOR_SHUFFLE_ILVL(Op, ResTy, Indices, DAG);
2895 Result = lowerVECTOR_SHUFFLE_ILVR(Op, ResTy, Indices, DAG);
2898 Result = lowerVECTOR_SHUFFLE_PCKEV(Op, ResTy, Indices, DAG);
2901 Result = lowerVECTOR_SHUFFLE_PCKOD(Op, ResTy, Indices, DAG);
2904 Result = lowerVECTOR_SHUFFLE_SHF(Op, ResTy, Indices, DAG);
2907 return lowerVECTOR_SHUFFLE_VSHF(Op, ResTy, Indices, DAG);