Lines Matching refs:SetCC
79 setTargetDAGCombine(ISD::SETCC);
175 setOperationAction(ISD::SETCC, MVT::i32, Legal);
179 setOperationAction(ISD::SETCC, MVT::f32, Legal);
184 setOperationAction(ISD::SETCC, MVT::f64, Legal);
222 setOperationAction(ISD::SETCC, MVT::i64, Legal);
285 setOperationAction(ISD::SETCC, Ty, Legal);
322 setOperationAction(ISD::SETCC, Ty, Legal);
989 // (vselect (setcc $a, $b, SETLT), $b, $a)) -> (vsmax $a, $b)
990 // (vselect (setcc $a, $b, SETLE), $b, $a)) -> (vsmax $a, $b)
991 // (vselect (setcc $a, $b, SETLT), $a, $b)) -> (vsmin $a, $b)
992 // (vselect (setcc $a, $b, SETLE), $a, $b)) -> (vsmin $a, $b)
993 // (vselect (setcc $a, $b, SETULT), $b, $a)) -> (vumax $a, $b)
994 // (vselect (setcc $a, $b, SETULE), $b, $a)) -> (vumax $a, $b)
995 // (vselect (setcc $a, $b, SETULT), $a, $b)) -> (vumin $a, $b)
996 // (vselect (setcc $a, $b, SETULE), $a, $b)) -> (vumin $a, $b)
1002 if (Op0->getOpcode() != ISD::SETCC)
1027 SDValue SetCC = N->getOperand(0);
1029 if (SetCC.getOpcode() != MipsISD::SETCC_DSP)
1033 SetCC.getOperand(0), SetCC.getOperand(1),
1034 N->getOperand(1), N->getOperand(2), SetCC.getOperand(2));
1096 case ISD::SETCC:
