Lines Matching defs:CC
136 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDLoc dl);
1989 ISD::CondCode CC, SDLoc dl) {
1995 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
2023 } else if (ISD::isUnsignedIntSetCC(CC)) {
2039 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
2070 } else if (ISD::isUnsignedIntSetCC(CC)) {
2092 static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC) {
2093 switch (CC) {
2123 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert) {
2125 switch (CC) {
2155 static unsigned int getVCmpInst(MVT VecVT, ISD::CondCode CC,
2162 switch (CC) {
2163 case ISD::SETLE: CC = ISD::SETGE; Swap = true; break;
2164 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break;
2165 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break;
2166 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break;
2167 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break;
2168 case ISD::SETUGT: CC = ISD::SETULT; Swap = true; break;
2172 switch (CC) {
2173 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break;
2174 case ISD::SETUNE: CC = ISD::SETOEQ; Negate = true; break;
2175 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break;
2176 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break;
2180 switch (CC) {
2208 switch (CC) {
2209 case ISD::SETGE: CC = ISD::SETLE; Swap = true; break;
2210 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break;
2211 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break;
2212 case ISD::SETULT: CC = ISD::SETUGT; Swap = true; break;
2216 switch (CC) {
2217 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break;
2218 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break;
2219 CC = ISD::SETGT; Negate = true; break;
2220 case ISD::SETULE: CC = ISD::SETUGT; Negate = true; break;
2224 switch (CC) {
2266 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
2278 switch (CC) {
2310 switch (CC) {
2360 unsigned int VCmpInst = getVCmpInst(VecVT.getSimpleVT(), CC,
2380 unsigned Idx = getCRIdxForSetCC(CC, Inv);
2381 SDValue CCReg = SelectCC(LHS, RHS, CC, dl);
2739 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get();
2749 // Handle the setcc cases here. select_cc lhs, 0, 1, 0, cc
2755 N2C->getZExtValue() == 1ULL && CC == ISD::SETNE &&
2766 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl);
2771 unsigned Idx = getCRIdxForSetCC(CC, Inv);
2775 default: llvm_unreachable("Invalid CC index");
2797 unsigned BROpc = getPredicateForSetCC(CC);
2911 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
2912 unsigned PCC = getPredicateForSetCC(CC);
2937 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl);
3110 ISD::CondCode CC = cast<CondCodeSDNode>(O.getOperand(4))->get();
3138 Op0.getOperand(1) == Op1.getOperand(1) && CC == ISD::SETEQ &&
3160 if (Op0.getOpcode() == ISD::XOR && CC == ISD::SETULT &&
3182 if (CC != ISD::SETEQ)
