Lines Matching full:mri
58 MachineRegisterInfo &MRI) {
60 return RC->hasSubClassEq(MRI.getRegClass(Reg));
68 bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) {
69 return IsRegInClass(Reg, &PPC::VSRCRegClass, MRI);
72 bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) {
73 return IsRegInClass(Reg, &PPC::VRRCRegClass, MRI);
76 bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) {
77 return IsRegInClass(Reg, &PPC::F8RCRegClass, MRI);
80 bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) {
81 return IsRegInClass(Reg, &PPC::VSFRCRegClass, MRI);
84 bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) {
85 return IsRegInClass(Reg, &PPC::VSSRCRegClass, MRI);
92 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
102 if ( IsVSReg(DstMO.getReg(), MRI) &&
103 !IsVSReg(SrcMO.getReg(), MRI)) {
108 IsVRReg(SrcMO.getReg(), MRI) ? &PPC::VSHRCRegClass :
110 assert((IsF8Reg(SrcMO.getReg(), MRI) ||
111 IsVRReg(SrcMO.getReg(), MRI) ||
112 IsVSSReg(SrcMO.getReg(), MRI) ||
113 IsVSFReg(SrcMO.getReg(), MRI)) &&
116 unsigned NewVReg = MRI.createVirtualRegister(SrcRC);
122 .addImm(IsVRReg(SrcMO.getReg(), MRI) ? PPC::sub_128 :
127 } else if (!IsVSReg(DstMO.getReg(), MRI) &&
128 IsVSReg(SrcMO.getReg(), MRI)) {
133 IsVRReg(DstMO.getReg(), MRI) ? &PPC::VSHRCRegClass :
135 assert((IsF8Reg(DstMO.getReg(), MRI) ||
136 IsVSFReg(DstMO.getReg(), MRI) ||
137 IsVSSReg(DstMO.getReg(), MRI) ||
138 IsVRReg(DstMO.getReg(), MRI)) &&
142 unsigned NewVReg = MRI.createVirtualRegister(DstRC);
149 SrcMO.setSubReg(IsVRReg(DstMO.getReg(), MRI) ? PPC::sub_128 :
