Lines Matching defs:Kind
59 unsigned Kind) override;
174 } Kind;
185 RegisterKind Kind;
205 SparcOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
207 bool isToken() const override { return Kind == k_Token; }
208 bool isReg() const override { return Kind == k_Register; }
209 bool isImm() const override { return Kind == k_Immediate; }
211 bool isMEMrr() const { return Kind == k_MemoryReg; }
212 bool isMEMri() const { return Kind == k_MemoryImm; }
215 return (Kind == k_Register && Reg.Kind == rk_IntReg);
219 return (Kind == k_Register && Reg.Kind == rk_FloatReg);
223 return (Kind == k_Register && (Reg.Kind == rk_FloatReg
224 || Reg.Kind == rk_DoubleReg));
229 assert(Kind == k_Token && "Invalid access!");
234 assert((Kind == k_Register) && "Invalid access!");
239 assert((Kind == k_Immediate) && "Invalid access!");
244 assert((Kind == k_MemoryReg || Kind == k_MemoryImm) && "Invalid access!");
249 assert((Kind == k_MemoryReg) && "Invalid access!");
254 assert((Kind == k_MemoryImm) && "Invalid access!");
268 switch (Kind) {
329 static std::unique_ptr<SparcOperand> CreateReg(unsigned RegNum, unsigned Kind,
333 Op->Reg.Kind = (SparcOperand::RegisterKind)Kind;
350 assert(Op.Reg.Kind == rk_IntReg);
363 Op.Reg.Kind = rk_IntPairReg;
369 assert(Op.Reg.Kind == rk_FloatReg);
374 Op.Reg.Kind = rk_DoubleReg;
381 switch (Op.Reg.Kind) {
382 default: llvm_unreachable("Unexpected register kind!");
397 Op.Reg.Kind = rk_QuadReg;
404 Op->Kind = k_MemoryReg;
425 Op->Kind = k_MemoryImm;
1199 unsigned Kind) {
1202 switch (Kind) {
1214 if (Op.isIntReg() && Kind == MCK_IntPair) {
