Lines Matching refs:addReg
514 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(Reg));
519 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(Reg));
550 MCInstBuilder(X86::MOV32rr).addReg(LocalFrameReg).addReg(FrameReg));
604 .addReg(X86::ESP)
605 .addReg(X86::ESP)
608 Out, MCInstBuilder(X86::PUSH32r).addReg(RegCtx.AddressReg(MVT::i32)));
631 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ShadowRegI32).addReg(
634 .addReg(ShadowRegI32)
635 .addReg(ShadowRegI32)
651 Out, MCInstBuilder(X86::TEST8rr).addReg(ShadowRegI8).addReg(ShadowRegI8));
656 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ScratchRegI32).addReg(
659 .addReg(ScratchRegI32)
660 .addReg(ScratchRegI32)
677 .addReg(ScratchRegI32)
678 .addReg(ScratchRegI32)
685 MCInstBuilder(X86::MOVSX32rr8).addReg(ShadowRegI32).addReg(ShadowRegI8));
686 EmitInstruction(Out, MCInstBuilder(X86::CMP32rr).addReg(ScratchRegI32).addReg(
702 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ShadowRegI32).addReg(
705 .addReg(ShadowRegI32)
706 .addReg(ShadowRegI32)
744 Out, MCInstBuilder(X86::TEST32rr).addReg(X86::ECX).addReg(X86::ECX));
772 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(Reg));
777 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(Reg));
808 MCInstBuilder(X86::MOV64rr).addReg(LocalFrameReg).addReg(FrameReg));
873 .addReg(X86::RSP)
874 .addReg(X86::RSP)
878 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(X86::RDI).addReg(
904 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(ShadowRegI64).addReg(
907 .addReg(ShadowRegI64)
908 .addReg(ShadowRegI64)
923 Out, MCInstBuilder(X86::TEST8rr).addReg(ShadowRegI8).addReg(ShadowRegI8));
928 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ScratchRegI32).addReg(
931 .addReg(ScratchRegI32)
932 .addReg(ScratchRegI32)
949 .addReg(ScratchRegI32)
950 .addReg(ScratchRegI32)
957 MCInstBuilder(X86::MOVSX32rr8).addReg(ShadowRegI32).addReg(ShadowRegI8));
958 EmitInstruction(Out, MCInstBuilder(X86::CMP32rr).addReg(ScratchRegI32).addReg(
974 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(ShadowRegI64).addReg(
977 .addReg(ShadowRegI64)
978 .addReg(ShadowRegI64)
1017 Out, MCInstBuilder(X86::TEST64rr).addReg(X86::RCX).addReg(X86::RCX));
