Lines Matching refs:insn
192 * @param insn - The instruction with the reader function to use. The cursor
198 static int consumeByte(struct InternalInstruction* insn, uint8_t* byte) {
199 int ret = insn->reader(insn->readerArg, byte, insn->readerCursor);
202 ++(insn->readerCursor);
210 * @param insn - See consumeByte().
214 static int lookAtByte(struct InternalInstruction* insn, uint8_t* byte) {
215 return insn->reader(insn->readerArg, byte, insn->readerCursor);
218 static void unconsumeByte(struct InternalInstruction* insn) {
219 insn->readerCursor--;
223 static int name(struct InternalInstruction* insn, type* ptr) { \
228 int ret = insn->reader(insn->readerArg, \
230 insn->readerCursor + offset); \
236 insn->readerCursor += sizeof(type); \
245 * @param insn - See consumeByte().
261 * @param insn - The instruction containing the logging function.
265 static void dbgprintf(struct InternalInstruction* insn,
271 if (!insn->dlog)
278 insn->dlog(insn->dlogArg, buffer);
287 * @param insn - The instruction to be marked as having the prefix.
292 static void setPrefixPresent(struct InternalInstruction* insn,
296 insn->prefixPresent[prefix] = 1;
297 insn->prefixLocations[prefix] = location;
304 * @param insn - The instruction to be queried.
309 static bool isPrefixAtLocation(struct InternalInstruction* insn,
313 return insn->prefixPresent[prefix] == 1 &&
314 insn->prefixLocations[prefix] == location;
322 * @param insn - The instruction whose prefixes are to be read.
326 static int readPrefixes(struct InternalInstruction* insn) {
336 dbgprintf(insn, "readPrefixes()");
339 prefixLocation = insn->readerCursor;
342 if (consumeByte(insn, &byte))
349 if (insn->readerCursor - 1 == insn->startLocation && byte == 0xf0)
352 if (insn->readerCursor - 1 == insn->startLocation
354 && !lookAtByte(insn, &nextByte))
366 insn->xAcquireRelease = true;
376 insn->xAcquireRelease = true;
377 if (insn->mode == MODE_64BIT && (nextByte & 0xf0) == 0x40) {
378 if (consumeByte(insn, &nextByte))
380 if (lookAtByte(insn, &nextByte))
382 unconsumeByte(insn);
393 dbgprintf(insn, "Redundant Group 1 prefix");
395 setPrefixPresent(insn, byte, prefixLocation);
405 insn->segmentOverride = SEG_OVERRIDE_CS;
408 insn->segmentOverride = SEG_OVERRIDE_SS;
411 insn->segmentOverride = SEG_OVERRIDE_DS;
414 insn->segmentOverride = SEG_OVERRIDE_ES;
417 insn->segmentOverride = SEG_OVERRIDE_FS;
420 insn->segmentOverride = SEG_OVERRIDE_GS;
427 dbgprintf(insn, "Redundant Group 2 prefix");
429 setPrefixPresent(insn, byte, prefixLocation);
433 dbgprintf(insn, "Redundant Group 3 prefix");
436 setPrefixPresent(insn, byte, prefixLocation);
440 dbgprintf(insn, "Redundant Group 4 prefix");
443 setPrefixPresent(insn, byte, prefixLocation);
451 dbgprintf(insn, "Found prefix 0x%hhx", byte);
454 insn->vectorExtensionType = TYPE_NO_VEX_XOP;
459 if (consumeByte(insn, &byte1)) {
460 dbgprintf(insn, "Couldn't read second byte of EVEX prefix");
464 if (lookAtByte(insn, &byte2)) {
465 dbgprintf(insn, "Couldn't read third byte of EVEX prefix");
469 if ((insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) &&
471 insn->vectorExtensionType = TYPE_EVEX;
473 unconsumeByte(insn); /* unconsume byte1 */
474 unconsumeByte(insn); /* unconsume byte */
475 insn->necessaryPrefixLocation = insn->readerCursor - 2;
478 if (insn->vectorExtensionType == TYPE_EVEX) {
479 insn->vectorExtensionPrefix[0] = byte;
480 insn->vectorExtensionPrefix[1] = byte1;
481 if (consumeByte(insn, &insn
482 dbgprintf(insn, "Couldn't read third byte of EVEX prefix");
485 if (consumeByte(insn, &insn->vectorExtensionPrefix[3])) {
486 dbgprintf(insn, "Couldn't read fourth byte of EVEX prefix");
491 if (insn->mode == MODE_64BIT) {
492 insn->rexPrefix = 0x40
493 | (wFromEVEX3of4(insn->vectorExtensionPrefix[2]) << 3)
494 | (rFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 2)
495 | (xFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 1)
496 | (bFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 0);
499 dbgprintf(insn, "Found EVEX prefix 0x%hhx 0x%hhx 0x%hhx 0x%hhx",
500 insn->vectorExtensionPrefix[0], insn->vectorExtensionPrefix[1],
501 insn->vectorExtensionPrefix[2], insn->vectorExtensionPrefix[3]);
506 if (lookAtByte(insn, &byte1)) {
507 dbgprintf(insn, "Couldn't read second byte of VEX");
511 if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) {
512 insn->vectorExtensionType = TYPE_VEX_3B;
513 insn->necessaryPrefixLocation = insn->readerCursor - 1;
515 unconsumeByte(insn);
516 insn->necessaryPrefixLocation = insn->readerCursor - 1;
519 if (insn->vectorExtensionType == TYPE_VEX_3B) {
520 insn->vectorExtensionPrefix[0] = byte;
521 consumeByte(insn, &insn->vectorExtensionPrefix[1]);
522 consumeByte(insn, &insn->vectorExtensionPrefix[2]);
526 if (insn->mode == MODE_64BIT) {
527 insn->rexPrefix = 0x40
528 | (wFromVEX3of3(insn->vectorExtensionPrefix[2]) << 3)
529 | (rFromVEX2of3(insn->vectorExtensionPrefix[1]) << 2)
530 | (xFromVEX2of3(insn->vectorExtensionPrefix[1]) << 1)
531 | (bFromVEX2of3(insn->vectorExtensionPrefix[1]) << 0);
534 dbgprintf(insn, "Found VEX prefix 0x%hhx 0x%hhx 0x%hhx",
535 insn->vectorExtensionPrefix[0], insn->vectorExtensionPrefix[1],
536 insn->vectorExtensionPrefix[2]);
541 if (lookAtByte(insn, &byte1)) {
542 dbgprintf(insn, "Couldn't read second byte of VEX");
546 if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) {
547 insn->vectorExtensionType = TYPE_VEX_2B;
549 unconsumeByte(insn);
552 if (insn->vectorExtensionType == TYPE_VEX_2B) {
553 insn->vectorExtensionPrefix[0] = byte;
554 consumeByte(insn, &insn->vectorExtensionPrefix[1]);
556 if (insn->mode == MODE_64BIT) {
557 insn->rexPrefix = 0x40
558 | (rFromVEX2of2(insn->vectorExtensionPrefix[1]) << 2);
561 switch (ppFromVEX2of2(insn->vectorExtensionPrefix[1])) {
569 dbgprintf(insn, "Found VEX prefix 0x%hhx 0x%hhx",
570 insn->vectorExtensionPrefix[0],
571 insn->vectorExtensionPrefix[1]);
576 if (lookAtByte(insn, &byte1)) {
577 dbgprintf(insn, "Couldn't read second byte of XOP");
582 insn->vectorExtensionType = TYPE_XOP;
583 insn->necessaryPrefixLocation = insn->readerCursor - 1;
585 unconsumeByte(insn);
586 insn->necessaryPrefixLocation = insn->readerCursor - 1;
589 if (insn->vectorExtensionType == TYPE_XOP) {
590 insn->vectorExtensionPrefix[0] = byte;
591 consumeByte(insn, &insn->vectorExtensionPrefix[1]);
592 consumeByte(insn, &insn->vectorExtensionPrefix[2]);
596 if (insn->mode == MODE_64BIT) {
597 insn->rexPrefix = 0x40
598 | (wFromXOP3of3(insn->vectorExtensionPrefix[2]) << 3)
599 | (rFromXOP2of3(insn->vectorExtensionPrefix[1]) << 2)
600 | (xFromXOP2of3(insn->vectorExtensionPrefix[1]) << 1)
601 | (bFromXOP2of3(insn->vectorExtensionPrefix[1]) << 0);
604 switch (ppFromXOP3of3(insn->vectorExtensionPrefix[2])) {
612 dbgprintf(insn, "Found XOP prefix 0x%hhx 0x%hhx 0x%hhx",
613 insn->vectorExtensionPrefix[0], insn->vectorExtensionPrefix[1],
614 insn->vectorExtensionPrefix[2]);
617 if (insn->mode == MODE_64BIT) {
621 if (lookAtByte(insn, &opcodeByte) || ((opcodeByte & 0xf0) == 0x40)) {
622 dbgprintf(insn, "Redundant REX prefix");
626 insn->rexPrefix = byte;
627 insn->necessaryPrefixLocation = insn->readerCursor - 2;
629 dbgprintf(insn, "Found REX prefix 0x%hhx", byte);
631 unconsumeByte(insn);
632 insn->necessaryPrefixLocation = insn->readerCursor - 1;
635 unconsumeByte(insn);
636 insn->necessaryPrefixLocation = insn->readerCursor - 1;
640 if (insn->mode == MODE_16BIT) {
641 insn->registerSize = (hasOpSize ? 4 : 2);
642 insn->addressSize = (hasAdSize ? 4 : 2);
643 insn->displacementSize = (hasAdSize ? 4 : 2);
644 insn->immediateSize = (hasOpSize ? 4 : 2);
645 } else if (insn->mode == MODE_32BIT) {
646 insn->registerSize = (hasOpSize ? 2 : 4);
647 insn->addressSize = (hasAdSize ? 2 : 4);
648 insn->displacementSize = (hasAdSize ? 2 : 4);
649 insn->immediateSize = (hasOpSize ? 2 : 4);
650 } else if (insn->mode == MODE_64BIT) {
651 if (insn->rexPrefix && wFromREX(insn->rexPrefix)) {
652 insn->registerSize = 8;
653 insn->addressSize = (hasAdSize ? 4 : 8);
654 insn->displacementSize = 4;
655 insn->immediateSize = 4;
656 } else if (insn->rexPrefix) {
657 insn->registerSize = (hasOpSize ? 2 : 4);
658 insn->addressSize = (hasAdSize ? 4 : 8);
659 insn->displacementSize = (hasOpSize ? 2 : 4);
660 insn->immediateSize = (hasOpSize ? 2 : 4);
662 insn->registerSize = (hasOpSize ? 2 : 4);
663 insn->addressSize = (hasAdSize ? 4 : 8);
664 insn->displacementSize = (hasOpSize ? 2 : 4);
665 insn->immediateSize = (hasOpSize ? 2 : 4);
676 * @param insn - The instruction whose opcode is to be read.
679 static int readOpcode(struct InternalInstruction* insn) {
684 dbgprintf(insn, "readOpcode()");
686 insn->opcodeType = ONEBYTE;
688 if (insn->vectorExtensionType == TYPE_EVEX) {
689 switch (mmFromEVEX2of4(insn->vectorExtensionPrefix[1])) {
691 dbgprintf(insn, "Unhandled mm field for instruction (0x%hhx)",
692 mmFromEVEX2of4(insn->vectorExtensionPrefix[1]));
695 insn->opcodeType = TWOBYTE;
696 return consumeByte(insn, &insn->opcode);
698 insn->opcodeType = THREEBYTE_38;
699 return consumeByte(insn, &insn->opcode);
701 insn->opcodeType = THREEBYTE_3A;
702 return consumeByte(insn, &insn->opcode);
704 } else if (insn->vectorExtensionType == TYPE_VEX_3B) {
705 switch (mmmmmFromVEX2of3(insn->vectorExtensionPrefix[1])) {
707 dbgprintf(insn, "Unhandled m-mmmm field for instruction (0x%hhx)",
708 mmmmmFromVEX2of3(insn->vectorExtensionPrefix[1]));
711 insn->opcodeType = TWOBYTE;
712 return consumeByte(insn, &insn->opcode);
714 insn->opcodeType = THREEBYTE_38;
715 return consumeByte(insn, &insn->opcode);
717 insn->opcodeType = THREEBYTE_3A;
718 return consumeByte(insn, &insn->opcode);
720 } else if (insn->vectorExtensionType == TYPE_VEX_2B) {
721 insn->opcodeType = TWOBYTE;
722 return consumeByte(insn, &insn->opcode);
723 } else if (insn->vectorExtensionType == TYPE_XOP) {
724 switch (mmmmmFromXOP2of3(insn->vectorExtensionPrefix[1])) {
726 dbgprintf(insn, "Unhandled m-mmmm field for instruction (0x%hhx)",
727 mmmmmFromVEX2of3(insn->vectorExtensionPrefix[1]));
730 insn->opcodeType = XOP8_MAP;
731 return consumeByte(insn, &insn->opcode);
733 insn->opcodeType = XOP9_MAP;
734 return consumeByte(insn, &insn->opcode);
736 insn->opcodeType = XOPA_MAP;
737 return consumeByte(insn, &insn->opcode);
741 if (consumeByte(insn, ¤t))
745 dbgprintf(insn, "Found a two-byte escape prefix (0x%hhx)", current);
747 if (consumeByte(insn, ¤t))
751 dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
753 if (consumeByte(insn, ¤t))
756 insn->opcodeType = THREEBYTE_38;
758 dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
760 if (consumeByte(insn, ¤t))
763 insn->opcodeType = THREEBYTE_3A;
765 dbgprintf(insn, "Didn't find a three-byte escape prefix");
767 insn->opcodeType = TWOBYTE;
776 insn->opcode = current;
781 static int readModRM(struct InternalInstruction* insn);
790 * @param insn - The instruction whose ID is to be determined.
796 struct InternalInstruction* insn,
802 hasModRMExtension = modRMRequired(insn->opcodeType,
804 insn->opcode);
807 if (readModRM(insn))
810 *instructionID = decode(insn->opcodeType,
812 insn->opcode,
813 insn->modRM);
815 *instructionID = decode(insn->opcodeType,
817 insn->opcode,
872 * @param insn - The instruction whose ID is to be determined.
876 static int getID(struct InternalInstruction* insn, const void *miiArg) {
880 dbgprintf(insn, "getID()");
884 if (insn->mode == MODE_64BIT)
887 if (insn->vectorExtensionType != TYPE_NO_VEX_XOP) {
888 attrMask |= (insn->vectorExtensionType == TYPE_EVEX) ? ATTR_EVEX : ATTR_VEX;
890 if (insn->vectorExtensionType == TYPE_EVEX) {
891 switch (ppFromEVEX3of4(insn->vectorExtensionPrefix[2])) {
903 if (zFromEVEX4of4(insn->vectorExtensionPrefix[3]))
905 if (bFromEVEX4of4(insn->vectorExtensionPrefix[3]))
907 if (aaaFromEVEX4of4(insn->vectorExtensionPrefix[3]))
909 if (lFromEVEX4of4(insn->vectorExtensionPrefix[3]))
911 if (l2FromEVEX4of4(insn->vectorExtensionPrefix[3]))
913 } else if (insn->vectorExtensionType == TYPE_VEX_3B) {
914 switch (ppFromVEX3of3(insn->vectorExtensionPrefix[2])) {
926 if (lFromVEX3of3(insn->vectorExtensionPrefix[2]))
928 } else if (insn->vectorExtensionType == TYPE_VEX_2B) {
929 switch (ppFromVEX2of2(insn->vectorExtensionPrefix[1])) {
941 if (lFromVEX2of2(insn->vectorExtensionPrefix[1]))
943 } else if (insn->vectorExtensionType == TYPE_XOP) {
944 switch (ppFromXOP3of3(insn->vectorExtensionPrefix[2])) {
956 if (lFromXOP3of3(insn->vectorExtensionPrefix[2]))
962 if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0x66, insn->necessaryPrefixLocation))
964 else if (isPrefixAtLocation(insn, 0x67, insn->necessaryPrefixLocation))
966 else if (isPrefixAtLocation(insn, 0xf3, insn->necessaryPrefixLocation))
968 else if (isPrefixAtLocation(insn, 0xf2, insn->necessaryPrefixLocation))
972 if (insn->rexPrefix & 0x08)
979 if (insn->mode == MODE_16BIT && insn->opcodeType == ONEBYTE &&
980 insn->opcode == 0xE3)
988 if (insn->mode == MODE_64BIT &&
989 isPrefixAtLocation(insn, 0x66, insn->necessaryPrefixLocation)) {
990 switch (insn->opcode) {
994 if (insn->opcodeType == ONEBYTE) {
996 insn->immediateSize = 4;
997 insn->displacementSize = 4;
1015 if (insn->opcodeType == TWOBYTE) {
1017 insn->immediateSize = 4;
1018 insn->displacementSize = 4;
1024 if (getIDWithAttrMask(&instructionID, insn, attrMask))
1029 if (insn->mode != MODE_64BIT &&
1030 insn->vectorExtensionType != TYPE_NO_VEX_XOP) {
1035 if ((insn->vectorExtensionType == TYPE_EVEX &&
1036 wFromEVEX3of4(insn->vectorExtensionPrefix[2])) ||
1037 (insn->vectorExtensionType == TYPE_VEX_3B &&
1038 wFromVEX3of3(insn->vectorExtensionPrefix[2])) ||
1039 (insn->vectorExtensionType == TYPE_XOP &&
1040 wFromXOP3of3(insn->vectorExtensionPrefix[2]))) {
1044 insn, attrMask | ATTR_REXW)) {
1045 insn->instructionID = instructionID;
1046 insn->spec = specifierForUID(instructionID);
1053 insn->instructionID = instructionIDWithREXW;
1054 insn->spec = specifierForUID(instructionIDWithREXW);
1067 if (insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0)) {
1069 if (insn->prefixPresent[0x67])
1071 if (insn->prefixPresent[0x66])
1075 if (insn->mode == MODE_16BIT)
1078 if (getIDWithAttrMask(&instructionID, insn, attrMask))
1081 insn->instructionID = instructionID;
1082 insn->spec = specifierForUID(instructionID);
1086 if ((insn->mode == MODE_16BIT || insn->prefixPresent[0x66]) &&
1103 insn,
1110 insn->instructionID = instructionID;
1111 insn->spec = spec;
1119 (insn->mode == MODE_16BIT) ^ insn->prefixPresent[0x66]) {
1120 insn->instructionID = instructionIDWithOpsize;
1121 insn->spec = specifierForUID(instructionIDWithOpsize);
1123 insn->instructionID = instructionID;
1124 insn->spec = spec;
1129 if (insn->opcodeType == ONEBYTE && insn->opcode == 0x90 &&
1130 insn->rexPrefix & 0x01) {
1143 insn->opcode = 0x91;
1146 insn,
1148 insn->opcode = 0x90;
1150 insn->instructionID = instructionID;
1151 insn->spec = spec;
1158 insn->opcode = 0x90;
1160 insn->instructionID = instructionIDWithNewOpcode;
1161 insn->spec = specWithNewOpcode;
1166 insn->instructionID = instructionID;
1167 insn->spec = specifierForUID(insn->instructionID);
1176 * @param insn - The instruction whose SIB byte is to be read.
1179 static int readSIB(struct InternalInstruction* insn) {
1184 dbgprintf(insn, "readSIB()");
1186 if (insn->consumedSIB)
1189 insn->consumedSIB = true;
1191 switch (insn->addressSize) {
1193 dbgprintf(insn, "SIB-based addressing doesn't work in 16-bit mode");
1205 if (consumeByte(insn, &insn->sib))
1208 index = indexFromSIB(insn->sib) | (xFromREX(insn->rexPrefix) << 3);
1223 if (insn->vectorExtensionType == TYPE_EVEX)
1224 index |= v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4;
1227 insn->sibIndex = SIB_INDEX_NONE;
1229 insn->sibIndex = (SIBIndex)(sibIndexBase + index);
1232 insn->sibScale = 1 << scaleFromSIB(insn->sib);
1234 base = baseFromSIB(insn->sib) | (bFromREX(insn->rexPrefix) << 3);
1239 switch (modFromModRM(insn->modRM)) {
1241 insn->eaDisplacement = EA_DISP_32;
1242 insn->sibBase = SIB_BASE_NONE;
1245 insn->eaDisplacement = EA_DISP_8;
1246 insn->sibBase = (SIBBase)(sibBaseBase + base);
1249 insn->eaDisplacement = EA_DISP_32;
1250 insn->sibBase = (SIBBase)(sibBaseBase + base);
1258 insn->sibBase = (SIBBase)(sibBaseBase + base);
1268 * @param insn - The instruction whose displacement is to be read.
1272 static int readDisplacement(struct InternalInstruction* insn) {
1277 dbgprintf(insn, "readDisplacement()");
1279 if (insn->consumedDisplacement)
1282 insn->consumedDisplacement = true;
1283 insn->displacementOffset = insn->readerCursor - insn->startLocation;
1285 switch (insn->eaDisplacement) {
1287 insn->consumedDisplacement = false;
1290 if (consumeInt8(insn, &d8))
1292 insn->displacement = d8;
1295 if (consumeInt16(insn, &d16))
1297 insn->displacement = d16;
1300 if (consumeInt32(insn, &d32))
1302 insn->displacement = d32;
1306 insn->consumedDisplacement = true;
1314 * @param insn - The instruction whose addressing information is to be read.
1317 static int readModRM(struct InternalInstruction* insn) {
1320 dbgprintf(insn, "readModRM()");
1322 if (insn->consumedModRM)
1325 if (consumeByte(insn, &insn->modRM))
1327 insn->consumedModRM = true;
1329 mod = modFromModRM(insn->modRM);
1330 rm = rmFromModRM(insn->modRM);
1331 reg = regFromModRM(insn->modRM);
1334 * This goes by insn->registerSize to pick the correct register, which messes
1338 switch (insn->registerSize) {
1340 insn->regBase = MODRM_REG_AX;
1341 insn->eaRegBase = EA_REG_AX;
1344 insn->regBase = MODRM_REG_EAX;
1345 insn->eaRegBase = EA_REG_EAX;
1348 insn->regBase = MODRM_REG_RAX;
1349 insn->eaRegBase = EA_REG_RAX;
1353 reg |= rFromREX(insn->rexPrefix) << 3;
1354 rm |= bFromREX(insn->rexPrefix) << 3;
1355 if (insn->vectorExtensionType == TYPE_EVEX) {
1356 reg |= r2FromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4;
1357 rm |= xFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4;
1360 insn->reg = (Reg)(insn->regBase + reg);
1362 switch (insn->addressSize) {
1364 insn->eaBaseBase = EA_BASE_BX_SI;
1369 insn->eaBase = EA_BASE_NONE;
1370 insn->eaDisplacement = EA_DISP_16;
1371 if (readDisplacement(insn))
1374 insn->eaBase = (EABase)(insn->eaBaseBase + rm);
1375 insn->eaDisplacement = EA_DISP_NONE;
1379 insn->eaBase = (EABase)(insn->eaBaseBase + rm);
1380 insn->eaDisplacement = EA_DISP_8;
1381 insn->displacementSize = 1;
1382 if (readDisplacement(insn))
1386 insn->eaBase = (EABase)(insn->eaBaseBase + rm);
1387 insn->eaDisplacement = EA_DISP_16;
1388 if (readDisplacement(insn))
1392 insn->eaBase = (EABase)(insn->eaRegBase + rm);
1393 if (readDisplacement(insn))
1400 insn->eaBaseBase = (insn->addressSize == 4 ? EA_BASE_EAX : EA_BASE_RAX);
1404 insn->eaDisplacement = EA_DISP_NONE; /* readSIB may override this */
1410 insn->eaBase = (insn->addressSize == 4 ?
1412 if (readSIB(insn) || readDisplacement(insn))
1416 insn->eaBase = EA_BASE_NONE;
1417 insn->eaDisplacement = EA_DISP_32;
1418 if (readDisplacement(insn))
1422 insn->eaBase = (EABase)(insn->eaBaseBase + rm);
1427 insn->displacementSize = 1;
1430 insn->eaDisplacement = (mod == 0x1 ? EA_DISP_8 : EA_DISP_32);
1433 insn->eaBase = EA_BASE_sib;
1434 if (readSIB(insn) || readDisplacement(insn))
1438 insn->eaBase = (EABase)(insn->eaBaseBase + rm);
1439 if (readDisplacement(insn))
1445 insn->eaDisplacement = EA_DISP_NONE;
1446 insn->eaBase = (EABase)(insn->eaRegBase + rm);
1450 } /* switch (insn->addressSize) */
1456 static uint8_t name(struct InternalInstruction *insn, \
1469 if (insn->rexPrefix && \
1519 * @param insn - The instruction containing the operand.
1526 GENERIC_FIXUP_FUNC(fixupRegValue, insn->regBase, MODRM_REG)
1527 GENERIC_FIXUP_FUNC(fixupRMValue, insn->eaRegBase, EA_REG)
1533 * @param insn - See fixup*Value().
1538 static int fixupReg(struct InternalInstruction *insn,
1542 dbgprintf(insn, "fixupReg()");
1549 insn->vvvv = (Reg)fixupRegValue(insn,
1551 insn->vvvv,
1557 insn->reg = (Reg)fixupRegValue(insn,
1559 insn->reg - insn->regBase,
1565 if (insn->eaBase >= insn->eaRegBase) {
1566 insn->eaBase = (EABase)fixupRMValue(insn,
1568 insn->eaBase - insn->eaRegBase,
1584 * @param insn - the instruction whose opcode field is to be read.
1590 static int readOpcodeRegister(struct InternalInstruction* insn, uint8_t size) {
1591 dbgprintf(insn, "readOpcodeRegister()");
1594 size = insn->registerSize;
1598 insn->opcodeRegister = (Reg)(MODRM_REG_AL + ((bFromREX(insn->rexPrefix) << 3)
1599 | (insn->opcode & 7)));
1600 if (insn->rexPrefix &&
1601 insn->opcodeRegister >= MODRM_REG_AL + 0x4 &&
1602 insn->opcodeRegister < MODRM_REG_AL + 0x8) {
1603 insn->opcodeRegister = (Reg)(MODRM_REG_SPL
1604 + (insn->opcodeRegister - MODRM_REG_AL - 4));
1609 insn->opcodeRegister = (Reg)(MODRM_REG_AX
1610 + ((bFromREX(insn->rexPrefix) << 3)
1611 | (insn->opcode & 7)));
1614 insn->opcodeRegister = (Reg)(MODRM_REG_EAX
1615 + ((bFromREX(insn->rexPrefix) << 3)
1616 | (insn->opcode & 7)));
1619 insn->opcodeRegister = (Reg)(MODRM_REG_RAX
1620 + ((bFromREX(insn->rexPrefix) << 3)
1621 | (insn->opcode & 7)));
1632 * @param insn - The instruction whose operand is to be read.
1637 static int readImmediate(struct InternalInstruction* insn, uint8_t size) {
1643 dbgprintf(insn, "readImmediate()");
1645 if (insn->numImmediatesConsumed == 2) {
1651 size = insn->immediateSize;
1653 insn->immediateSize = size;
1654 insn->immediateOffset = insn->readerCursor - insn->startLocation;
1658 if (consumeByte(insn, &imm8))
1660 insn->immediates[insn->numImmediatesConsumed] = imm8;
1663 if (consumeUInt16(insn, &imm16))
1665 insn->immediates[insn->numImmediatesConsumed] = imm16;
1668 if (consumeUInt32(insn, &imm32))
1670 insn->immediates[insn->numImmediatesConsumed] = imm32;
1673 if (consumeUInt64(insn, &imm64))
1675 insn->immediates[insn->numImmediatesConsumed] = imm64;
1679 insn->numImmediatesConsumed++;
1687 * @param insn - The instruction whose operand is to be read.
1691 static int readVVVV(struct InternalInstruction* insn) {
1692 dbgprintf(insn, "readVVVV()");
1695 if (insn->vectorExtensionType == TYPE_EVEX)
1696 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 |
1697 vvvvFromEVEX3of4(insn->vectorExtensionPrefix[2]));
1698 else if (insn->vectorExtensionType == TYPE_VEX_3B)
1699 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]);
1700 else if (insn->vectorExtensionType == TYPE_VEX_2B)
1701 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]);
1702 else if (insn->vectorExtensionType == TYPE_XOP)
1703 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]);
1707 if (insn->mode != MODE_64BIT)
1710 insn->vvvv = static_cast<Reg>(vvvv);
1718 * @param insn - The instruction whose opcode field is to be read.
1721 static int readMaskRegister(struct InternalInstruction* insn) {
1722 dbgprintf(insn, "readMaskRegister()");
1724 if (insn->vectorExtensionType != TYPE_EVEX)
1727 insn->writemask =
1728 static_cast<Reg>(aaaFromEVEX4of4(insn->vectorExtensionPrefix[3]));
1736 * @param insn - The instruction whose operands are to be read and interpreted.
1739 static int readOperands(struct InternalInstruction* insn) {
1743 dbgprintf(insn, "readOperands()");
1747 hasVVVV = !readVVVV(insn);
1748 needVVVV = hasVVVV && (insn->vvvv != 0);
1750 for (const auto &Op : x86OperandSets[insn->spec->operands]) {
1758 if (readModRM(insn))
1760 if (fixupReg(insn, &Op))
1763 if (Op.encoding != ENCODING_REG && insn->eaDisplacement == EA_DISP_8)
1764 insn->displacement *= 1 << (Op.encoding - ENCODING_RM);
1772 dbgprintf(insn, "We currently don't hande code-offset encodings");
1778 insn->immediates[insn->numImmediatesConsumed] =
1779 insn->immediates[insn->numImmediatesConsumed - 1] & 0xf;
1780 ++insn->numImmediatesConsumed;
1783 if (readImmediate(insn, 1))
1790 if (readImmediate(insn, 2))
1794 if (readImmediate(insn, 4))
1798 if (readImmediate(insn, 8))
1802 if (readImmediate(insn, insn->immediateSize))
1806 if (readImmediate(insn, insn->addressSize))
1810 if (readOpcodeRegister(insn, 1))
1814 if (readOpcodeRegister(insn, 2))
1818 if (readOpcodeRegister(insn, 4))
1822 if (readOpcodeRegister(insn, 8))
1826 if (readOpcodeRegister(insn, 0))
1835 if (fixupReg(insn, &Op))
1839 if (readMaskRegister(insn))
1845 dbgprintf(insn, "Encountered an operand with an unknown encoding.");
1860 * @param insn - A pointer to the instruction to be populated. Must be
1877 struct InternalInstruction *insn, byteReader_t reader,
1880 memset(insn, 0, sizeof(struct InternalInstruction));
1882 insn->reader = reader;
1883 insn->readerArg = readerArg;
1884 insn->dlog = logger;
1885 insn->dlogArg = loggerArg;
1886 insn->startLocation = startLoc;
1887 insn->readerCursor = startLoc;
1888 insn->mode = mode;
1889 insn->numImmediatesConsumed = 0;
1891 if (readPrefixes(insn) ||
1892 readOpcode(insn) ||
1893 getID(insn, miiArg) ||
1894 insn->instructionID == 0 ||
1895 readOperands(insn))
1898 insn->operands = x86OperandSets[insn->spec->operands];
1900 insn->length = insn->readerCursor - insn->startLocation;
1902 dbgprintf(insn, "Read from 0x%llx to 0x%llx: length %zu",
1903 startLoc, insn->readerCursor, insn->length);
1905 if (insn->length > 15)
1906 dbgprintf(insn, "Instruction exceeds 15-byte limit");
